kernel/linux.git/drivers/pinctrl/spacemit, branch v7.2-rc2

pinctrl: spacemit: Use FIELD_MODIFY()

2026-05-27T12:11:23+00:00

Use FIELD_MODIFY() to remove open-coded bit manipulation. No functional change intended. Signed-off-by: Hans Zhang <18255117159@163.com> Signed-off-by: Linus Walleij

pinctrl: spacemit: move over to generic pinmux dt_node_to_map implementation

2026-05-26T11:32:52+00:00

Replace the custom implementation of dt_node_to_map with pinctrl_generic_dt_node_to_map() to demonstrate its use. spacemit_pin_mux_config didn't provide much value in the first place, because the group contains the information required to look up the spacemit_pin struct corresponding to a pin, so there's no loss in functionality as a result of the generic function carrying only the mux data in the group's data pointer rather than having an array of spacemit_pin_mux_config structs. Signed-off-by: Conor Dooley Reviewed-by: Troy Mitchell Signed-off-by: Linus Walleij

pinctrl: spacemit: delete spacemit_pctrl_check_power()

2026-05-26T11:32:52+00:00

As far as I can tell spacemit_pctrl_check_power(), called during the custom implementation of dt_node_to_map, is redundant because the driver's implementation generate_config performs the check too. Removing this would allow the driver to use the newly added common function pinctrl_generic_pinmux_dt_node_to_map(). Signed-off-by: Conor Dooley Signed-off-by: Linus Walleij

pinctrl: spacemit: fix NULL check in spacemit_pin_set_config

2026-05-25T08:47:16+00:00

spacemit_pin_set_config() looks up the per-pin descriptor with spacemit_get_pin() then checks the wrong variable for failure: const struct spacemit_pin *spin = spacemit_get_pin(pctrl, pin); ... if (!pin) return -EINVAL; reg = spacemit_pin_to_reg(pctrl, spin->pin); pin is an unsigned int pin id, where 0 (GPIO_0 / gmac0_rxdv on K3) is a valid pin, so rejecting it here drops the PAD config write for the first pin of every group. On K3 Pico-ITX the GMAC RGMII group lists pin 0 as its first entry, so its drive-strength / bias configuration was silently ignored. The intended guard is against spacemit_get_pin() returning NULL when the pin id isn't in the SoC's pin table. Check spin instead, which both restores PAD setup for pin 0 and prevents a NULL deref on spin->pin. Fixes: a83c29e1d145 ("pinctrl: spacemit: add support for SpacemiT K1 SoC") Signed-off-by: Han Gao Reviewed-by: Troy Mitchell Reviewed-by: Yixun Lan Signed-off-by: Linus Walleij

pinctrl: spacemit: return -ENOTSUPP for unsupported pin configurations

2026-03-19T12:52:56+00:00

Return -ENOTSUPP instead of -EINVAL when encountering unsupported pin configuration parameters. This is more logical and allows the GPIO subsystem to gracefully handle unsupported parameters via functions like gpio_set_config_with_argument_optional(), which specifically ignores -ENOTSUPP but treats others as failure. Signed-off-by: Junhui Liu Reviewed-by: Anand Moon Reviewed-by: Bartosz Golaszewski Reviewed-by: Yixun Lan Signed-off-by: Linus Walleij

Convert 'alloc_obj' family to use the new default GFP_KERNEL argument

2026-02-22T01:09:51+00:00

This was done entirely with mindless brute force, using git grep -l '\

treewide: Replace kmalloc with kmalloc_obj for non-scalar types

2026-02-21T09:02:28+00:00

This is the result of running the Coccinelle script from scripts/coccinelle/api/kmalloc_objs.cocci. The script is designed to avoid scalar types (which need careful case-by-case checking), and instead replace kmalloc-family calls that allocate struct or union object instances: Single allocations: kmalloc(sizeof(TYPE), ...) are replaced with: kmalloc_obj(TYPE, ...) Array allocations: kmalloc_array(COUNT, sizeof(TYPE), ...) are replaced with: kmalloc_objs(TYPE, COUNT, ...) Flex array allocations: kmalloc(struct_size(PTR, FAM, COUNT), ...) are replaced with: kmalloc_flex(*PTR, FAM, COUNT, ...) (where TYPE may also be *VAR) The resulting allocations no longer return "void *", instead returning "TYPE *". Signed-off-by: Kees Cook

pinctrl: spacemit: support I/O power domain configuration

2026-01-19T23:50:34+00:00

Dual-voltage GPIO banks default to 3.3V operation. Even when a bank is externally supplied with 1.8V, the internal logic remains in the 3.3V domain, leading to functional failures. Add support for programming the IO domain power control registers to allow explicit configuration for 1.8V operation. These registers are secure due to hardware safety constraints. Specifically, configuring the domain for 1.8V while externally supplying 3.3V causes back-powering and potential pin damage. Consequently, access requires unlocking the AIB Secure Access Register (ASAR) in the APBC block before any read or write operation. Signed-off-by: Troy Mitchell Signed-off-by: Linus Walleij

pinctrl: spacemit: k3: adjust drive strength and schmitter trigger

2026-01-07T14:08:13+00:00

K3 SoC expand drive strength to 4 bits which support even larger settings table comparing to old SoC generation. Also schmitter trigger setting is changed to 1 bit. Signed-off-by: Yixun Lan Signed-off-by: Linus Walleij

pinctrl: spacemit: k3: add initial pin support

2026-01-07T14:08:13+00:00

For the pinctrl IP of SpacemiT's K3 SoC, it has different register offset comparing with previous SoC generation, so introduce a function to do the pin to offset mapping. Also add all the pinctrl data. Signed-off-by: Yixun Lan Signed-off-by: Linus Walleij