kernel/linux.git/drivers/pinctrl/samsung, branch linux-5.15.y

pinctrl: samsung: fix missing GPIOLIB on ARM64 Exynos config

2022-05-09T07:14:30+00:00

commit ac875df4d854ab13d9c4af682a1837a1214fecec upstream. The Samsung pinctrl drivers depend on OF_GPIO, which is part of GPIOLIB. ARMv7 Exynos platform selects GPIOLIB and Samsung pinctrl drivers. ARMv8 Exynos selects only the latter leading to possible wrong configuration on ARMv8 build: WARNING: unmet direct dependencies detected for PINCTRL_EXYNOS Depends on [n]: PINCTRL [=y] && OF_GPIO [=n] && (ARCH_EXYNOS [=y] || ARCH_S5PV210 || COMPILE_TEST [=y]) Selected by [y]: - ARCH_EXYNOS [=y] Always select the GPIOLIB from the Samsung pinctrl drivers to fix the issue. This requires removing of OF_GPIO dependency (to avoid recursive dependency), so add dependency on OF for COMPILE_TEST cases. Reported-by: Necip Fazil Yildiran Fixes: eed6b3eb20b9 ("arm64: Split out platform options to separate Kconfig") Cc: Signed-off-by: Krzysztof Kozlowski Reviewed-by: Arnd Bergmann Link: https://lore.kernel.org/r/20220420141407.470955-1-krzysztof.kozlowski@linaro.org Signed-off-by: Greg Kroah-Hartman

pinctrl: samsung: Remove EINT handler for Exynos850 ALIVE and CMGP gpios

2022-04-08T12:23:12+00:00

[ Upstream commit 96f79935015cf3d7ca6fabf63cd13b8af45a7713 ] GPIO_ALIVE and GPIO_CMGP blocks in Exynos850 SoC don't have EINT capabilities (like EINT_SVC register), and there are no corresponding interrupts wired to GIC. Instead those blocks have wake-up interrupts for each pin. The ".eint_gpio_init" callbacks were specified by mistake for these blocks, when porting pinctrl code from downstream kernel. That leads to error messages like this: samsung-pinctrl 11850000.pinctrl: irq number not available Remove ".eint_gpio_init" for pinctrl_alive and pinctrl_gpmc to fix this error. This change doesn't affect proper interrupt handling for related pins, as all those pins are handled in ".eint_wkup_init". Fixes: cdd3d945dcec ("pinctrl: samsung: Add Exynos850 SoC specific data") Signed-off-by: Sam Protsenko Link: https://lore.kernel.org/r/20220114203757.4860-1-semen.protsenko@linaro.org Signed-off-by: Krzysztof Kozlowski Signed-off-by: Sasha Levin

pinctrl: samsung: drop pin banks references on error paths

2022-04-08T12:22:53+00:00

commit 50ebd19e3585b9792e994cfa8cbee8947fe06371 upstream. The driver iterates over its devicetree children with for_each_child_of_node() and stores for later found node pointer. This has to be put in error paths to avoid leak during re-probing. Fixes: ab663789d697 ("pinctrl: samsung: Match pin banks with their device nodes") Cc: Signed-off-by: Krzysztof Kozlowski Reviewed-by: Sam Protsenko Reviewed-by: Chanho Park Link: https://lore.kernel.org/r/20220111201426.326777-2-krzysztof.kozlowski@canonical.com Signed-off-by: Greg Kroah-Hartman

Merge tag 'pinctrl-v5.15-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl

2021-09-02T21:22:56+00:00

Pull pin control updates from Linus Walleij: "This is the bulk of pin control changes for the v5.15 kernel cycle, no core changes at all this time, just driver work! New drivers: - New subdriver for Intel Keem Bay (an ARM-based SoC) - New subdriver for Qualcomm MDM9607 and SM6115 - New subdriver for ST Microelectronics STM32MP135 - New subdriver for Freescale i.MX8ULP ("Ultra Low Power") - New subdriver for Ingenic X2100 - Support for Qualcomm PMC8180, PMC8180C, SA8155p-adp PMIC GPIO - Support Samsung Exynos850 - Support Renesas RZ/G2L Enhancements: - A major refactoring of the Rockchip driver, breaking part of it out to a separate GPIO driver in drivers/gpio - Pin bias support on Renesas r8a77995 - Add SCI pins support to Ingenic JZ4755 and JZ4760 - Mediatek device tree bindings converted to YAML" * tag 'pinctrl-v5.15-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (53 commits) pinctrl: renesas: Add RZ/G2L pin and gpio controller driver pinctrl: samsung: Add Exynos850 SoC specific data dt-bindings: pinctrl: samsung: Add Exynos850 doc MAINTAINERS: Add maintainers for amd-pinctrl driver pinctrl: Add Intel Keem Bay pinctrl driver dt-bindings: pinctrl: Add bindings for Intel Keembay pinctrl driver pinctrl: zynqmp: Drop pinctrl_unregister for devm_ registered device dt-bindings: pinctrl: qcom-pmic-gpio: Remove the interrupts property dt-bindings: pinctrl: qcom-pmic-gpio: Convert qcom pmic gpio bindings to YAML dt-bindings: pinctrl: mt8195: Use real world values for drive-strength arguments dt-bindings: mediatek: convert pinctrl to yaml arm: dts: mt8183: Move pinfunc to include/dt-bindings/pinctrl arm: dts: mt8135: Move pinfunc to include/dt-bindings/pinctrl pinctrl: ingenic: Add .max_register in regmap_config pinctrl: ingenic: Fix bias config for X2000(E) pinctrl: ingenic: Fix incorrect pull up/down info pinctrl: Ingenic: Add pinctrl driver for X2100. dt-bindings: pinctrl: Add bindings for Ingenic X2100. pinctrl: Ingenic: Add SSI pins support for JZ4755 and JZ4760. pinctrl: Ingenic: Improve the code. ...

pinctrl: samsung: Add Exynos850 SoC specific data

2021-08-13T07:39:42+00:00

Add Samsung Exynos850 SoC specific data to enable pinctrl support for all platforms based on Exynos850. Signed-off-by: Sam Protsenko Link: https://lore.kernel.org/r/20210811114827.27322-3-semen.protsenko@linaro.org [krzysztof: lower-case the hex-numbers] Signed-off-by: Krzysztof Kozlowski

pinctrl: Bulk conversion to generic_handle_domain_irq()

2021-08-12T10:39:39+00:00

Wherever possible, replace constructs that match either generic_handle_irq(irq_find_mapping()) or generic_handle_irq(irq_linear_revmap()) to a single call to generic_handle_domain_irq(). Acked-by: Krzysztof Kozlowski Acked-by: Linus Walleij Signed-off-by: Marc Zyngier

pinctrl: samsung: Fix pinctrl bank pin count

2021-08-02T13:22:18+00:00

Commit 1abd18d1a51a ("pinctrl: samsung: Register pinctrl before GPIO") changes the order of GPIO and pinctrl registration: now pinctrl is registered before GPIO. That means gpio_chip->ngpio is not set when samsung_pinctrl_register() called, and one cannot rely on that value anymore. Use `pin_bank->nr_pins' instead of `pin_bank->gpio_chip.ngpio' to fix mentioned inconsistency. Fixes: 1abd18d1a51a ("pinctrl: samsung: Register pinctrl before GPIO") Signed-off-by: Jaehyoung Choi Signed-off-by: Sam Protsenko Link: https://lore.kernel.org/r/20210730192905.7173-1-semen.protsenko@linaro.org Signed-off-by: Krzysztof Kozlowski

pinctrl: samsung: use 'int' for register masks in Exynos

2021-04-10T00:06:36+00:00

The Special Function Registers on all Exynos SoC, including ARM64, are 32-bit wide, so entire driver uses matching functions like readl() or writel(). On 64-bit ARM using unsigned long for register masks: 1. makes little sense as immediately after bitwise operation it will be cast to 32-bit value when calling writel(), 2. is actually error-prone because it might promote other operands to 64-bit. Addresses-Coverity: Unintentional integer overflow Signed-off-by: Krzysztof Kozlowski Reviewed-by: Sylwester Nawrocki Link: https://lore.kernel.org/r/20210408195029.69974-1-krzysztof.kozlowski@canonical.com Signed-off-by: Linus Walleij

pinctrl: samsung: use raw_spinlock for s3c64xx

2021-01-27T08:12:12+00:00

Convert spin_[lock|unlock] functions of pin bank to raw_spinlock to support preempt-rt for pinctrl-s3c64xx. Below patch converted spinlock_t to raw_spinlock_t but it didn't convert the s3c64xx's spinlock. Fixes: 1f306ecbe0f6 ("pinctrl: samsung: use raw_spinlock for locking") Cc: Tomasz Figa Cc: Krzysztof Kozlowski Cc: Sylwester Nawrocki Cc: Linus Walleij Signed-off-by: Chanho Park Link: https://lore.kernel.org/r/20210127001631.91209-1-chanho61.park@samsung.com Signed-off-by: Linus Walleij

pinctrl: samsung: use raw_spinlock for locking

2021-01-23T22:33:35+00:00

This patch converts spin_[lock|unlock] functions of pin bank to raw_spinlock to support preempt-rt. This can avoid BUG() assertion when irqchip callbacks are triggerred. Spinlocks can be converted rt_mutex which is preemptible when we apply preempt-rt patches. According to "Documentation/driver-api/gpio/driver.rst", "Realtime considerations: a realtime compliant GPIO driver should not use spinlock_t or any sleepable APIs (like PM runtime) as part of its irqchip implementation. - spinlock_t should be replaced with raw_spinlock_t.[1] " Cc: Tomasz Figa Cc: Krzysztof Kozlowski Cc: Sylwester Nawrocki Cc: Linus Walleij Signed-off-by: Chanho Park Reviewed-by: Linus Walleij Reviewed-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20210121030009.25673-1-chanho61.park@samsung.com Signed-off-by: Linus Walleij