<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/linux.git/drivers/pinctrl/qcom/Makefile, branch v6.6.132</title>
<subtitle>Linux kernel stable tree (mirror)</subtitle>
<id>https://git.radix-linux.su/kernel/linux.git/atom?h=v6.6.132</id>
<link rel='self' href='https://git.radix-linux.su/kernel/linux.git/atom?h=v6.6.132'/>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/'/>
<updated>2026-02-06T15:48:29+00:00</updated>
<entry>
<title>pinctrl: qcom: sm8350-lpass-lpi: Merge with SC7280 to fix I2S2 and SWR TX pins</title>
<updated>2026-02-06T15:48:29+00:00</updated>
<author>
<name>Krzysztof Kozlowski</name>
<email>krzysztof.kozlowski@oss.qualcomm.com</email>
</author>
<published>2026-02-03T17:04:00+00:00</published>
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<id>urn:sha1:21bad75012f76337022eeb00dadcaa07aa89f1f7</id>
<content type='text'>
[ Upstream commit 1fbe3abb449c5ef2178e1c3e3e8b9a43a7a410ac ]

Qualcomm SC7280 and SM8350 SoCs have slightly different LPASS audio
blocks (v9.4.5 and v9.2), however the LPASS LPI pin controllers are
exactly the same.  The driver for SM8350 has two issues, which can be
fixed by simply moving over to SC7280 driver which has them correct:

1. "i2s2_data_groups" listed twice GPIO12, but should have both GPIO12
   and GPIO13,

2. "swr_tx_data_groups" contained GPIO5 for "swr_tx_data2" function, but
   that function is also available on GPIO14, thus listing it twice is
   not necessary.  OTOH, GPIO5 has also "swr_rx_data1", so selecting
   swr_rx_data function should not block  the TX one.

Fixes: be9f6d56381d ("pinctrl: qcom: sm8350-lpass-lpi: add SM8350 LPASS TLMM")
Cc: stable@vger.kernel.org
Signed-off-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@oss.qualcomm.com&gt;
Reviewed-by: Bartosz Golaszewski &lt;bartosz.golaszewski@oss.qualcomm.com&gt;
Reviewed-by: Konrad Dybcio &lt;konrad.dybcio@oss.qualcomm.com&gt;
Signed-off-by: Linus Walleij &lt;linusw@kernel.org&gt;
[ Context, no dedicated config option ]
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>pinctrl: qcom: Introduce SM6115 LPI pinctrl driver</title>
<updated>2023-07-26T09:09:47+00:00</updated>
<author>
<name>Konrad Dybcio</name>
<email>konrad.dybcio@linaro.org</email>
</author>
<published>2023-07-24T11:39:57+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=63f7c8445ffe6667ac4cc9720ca36ad7d407709f'/>
<id>urn:sha1:63f7c8445ffe6667ac4cc9720ca36ad7d407709f</id>
<content type='text'>
Add support for the pin controller block on SM6115's Low Power Island.

Reviewed-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@linaro.org&gt;
Signed-off-by: Konrad Dybcio &lt;konrad.dybcio@linaro.org&gt;
Link: https://lore.kernel.org/r/20230722-topic-6115_lpasstlmm-v2-2-d4883831a858@linaro.org
Signed-off-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@linaro.org&gt;
</content>
</entry>
<entry>
<title>pinctrl: qcom: sm8350-lpass-lpi: add SM8350 LPASS TLMM</title>
<updated>2023-07-24T19:07:04+00:00</updated>
<author>
<name>Krzysztof Kozlowski</name>
<email>krzysztof.kozlowski@linaro.org</email>
</author>
<published>2023-07-19T19:20:57+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=be9f6d56381d995f600524ad99fa8a9cc5bd5c49'/>
<id>urn:sha1:be9f6d56381d995f600524ad99fa8a9cc5bd5c49</id>
<content type='text'>
Add driver for pin controller in Low Power Audio SubSystem (LPASS).  The
driver is similar to SM8250 LPASS pin controller, with difference in one
new pin (gpio14) belonging to swr_tx_data.

Link: https://lore.kernel.org/r/20230719192058.433517-2-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@linaro.org&gt;
</content>
</entry>
<entry>
<title>pinctrl: qcom: Add IPQ5018 pinctrl driver</title>
<updated>2023-06-09T07:00:09+00:00</updated>
<author>
<name>Sricharan Ramabadhran</name>
<email>quic_srichara@quicinc.com</email>
</author>
<published>2023-06-08T12:21:48+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=725d1c8916583f9c09e5f05e5a55dd47fdca61c1'/>
<id>urn:sha1:725d1c8916583f9c09e5f05e5a55dd47fdca61c1</id>
<content type='text'>
Add pinctrl definitions for the TLMM of IPQ5018.

Reviewed-by: Bjorn Andersson &lt;bjorn.andersson@linaro.org&gt;
Reviewed-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
Co-developed-by: Nitheesh Sekar &lt;quic_nsekar@quicinc.com&gt;
Signed-off-by: Nitheesh Sekar &lt;quic_nsekar@quicinc.com&gt;
Co-developed-by: Varadarajan Narayanan &lt;quic_varada@quicinc.com&gt;
Signed-off-by: Varadarajan Narayanan &lt;quic_varada@quicinc.com&gt;
Signed-off-by: Sricharan Ramabadhran &lt;quic_srichara@quicinc.com&gt;
Link: https://lore.kernel.org/r/20230608122152.3930377-5-quic_srichara@quicinc.com
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
</entry>
<entry>
<title>pinctrl: qcom: Add SDX75 pincontrol driver</title>
<updated>2023-05-29T09:47:57+00:00</updated>
<author>
<name>Rohit Agarwal</name>
<email>quic_rohiagar@quicinc.com</email>
</author>
<published>2023-05-18T15:57:12+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=0f9367525ad32eef888400106312709053798a53'/>
<id>urn:sha1:0f9367525ad32eef888400106312709053798a53</id>
<content type='text'>
Add initial Qualcomm SDX75 pinctrl driver to support pin configuration
with pinctrl framework for SDX75 SoC.
While at it, reordering the SDX65 entry.

Signed-off-by: Rohit Agarwal &lt;quic_rohiagar@quicinc.com&gt;
Reviewed-by: Bjorn Andersson &lt;andersson@kernel.org&gt;
Link: https://lore.kernel.org/r/1684425432-10072-4-git-send-email-quic_rohiagar@quicinc.com
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
</entry>
<entry>
<title>pinctrl: qcom: Add IPQ9574 pinctrl driver</title>
<updated>2023-03-19T21:00:47+00:00</updated>
<author>
<name>Devi Priya</name>
<email>quic_devipriy@quicinc.com</email>
</author>
<published>2023-03-16T07:29:38+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=c74eef68fd2d3a7821ecb57a607d597775df53ac'/>
<id>urn:sha1:c74eef68fd2d3a7821ecb57a607d597775df53ac</id>
<content type='text'>
Add pinctrl definitions for the TLMM of IPQ9574

Reviewed-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@linaro.org&gt;
Co-developed-by: Anusha Rao &lt;quic_anusha@quicinc.com&gt;
Signed-off-by: Anusha Rao &lt;quic_anusha@quicinc.com&gt;
Signed-off-by: Devi Priya &lt;quic_devipriy@quicinc.com&gt;
Link: https://lore.kernel.org/r/20230316072940.29137-5-quic_devipriy@quicinc.com
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
</entry>
<entry>
<title>pinctrl: qcom: Add SM7150 pinctrl driver</title>
<updated>2023-03-19T20:51:17+00:00</updated>
<author>
<name>Danila Tikhonov</name>
<email>danila@jiaxyga.com</email>
</author>
<published>2023-03-11T21:21:14+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=b915395c9e04361926ec329f784a1a6fda033492'/>
<id>urn:sha1:b915395c9e04361926ec329f784a1a6fda033492</id>
<content type='text'>
Add pinctrl driver for TLMM block found in SM7150 SoC.

Signed-off-by: Danila Tikhonov &lt;danila@jiaxyga.com&gt;
Link: https://lore.kernel.org/r/20230311212114.108870-3-danila@jiaxyga.com
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
</entry>
<entry>
<title>pinctrl: qcom: Introduce IPQ5332 TLMM driver</title>
<updated>2023-02-07T14:44:39+00:00</updated>
<author>
<name>Kathiravan T</name>
<email>quic_kathirav@quicinc.com</email>
</author>
<published>2023-02-06T07:12:10+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=75dc7e600ef53ddf6994a753b13385da174e72d4'/>
<id>urn:sha1:75dc7e600ef53ddf6994a753b13385da174e72d4</id>
<content type='text'>
The IPQ5332 SoC comes with a TLMM block, like all other Qualcomm
platforms, so add a driver for it.

Signed-off-by: Kathiravan T &lt;quic_kathirav@quicinc.com&gt;
Reviewed-by: Bjorn Andersson &lt;andersson@kernel.org&gt;
Link: https://lore.kernel.org/r/20230206071217.29313-3-quic_kathirav@quicinc.com
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
</entry>
<entry>
<title>pinctrl: qcom: pinctrl-sm8550-lpass-lpi: add SM8550 LPASS</title>
<updated>2023-02-06T11:15:51+00:00</updated>
<author>
<name>Krzysztof Kozlowski</name>
<email>krzysztof.kozlowski@linaro.org</email>
</author>
<published>2023-02-03T17:46:45+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=5a6ca1f240d6a268e1f63387a676b2cf9669fe21'/>
<id>urn:sha1:5a6ca1f240d6a268e1f63387a676b2cf9669fe21</id>
<content type='text'>
Add druver for pin controller in Low Power Audio SubSystem (LPASS).  The
driver is similar to SM8450 LPASS pin controller, with differences in
few pin groups (qua_mi2s -&gt; i2s0).

Signed-off-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@linaro.org&gt;
Reviewed-by: Konrad Dybcio &lt;konrad.dybcio@linaro.org&gt;
Link: https://lore.kernel.org/r/20230203174645.597053-2-krzysztof.kozlowski@linaro.org
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
</entry>
<entry>
<title>pinctrl: qcom: add the tlmm driver sa8775p platforms</title>
<updated>2023-02-01T22:44:49+00:00</updated>
<author>
<name>Yadu MG</name>
<email>quic_ymg@quicinc.com</email>
</author>
<published>2023-02-01T15:00:11+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=4b6b185599273ecf980e3892006a7a29c5ad653b'/>
<id>urn:sha1:4b6b185599273ecf980e3892006a7a29c5ad653b</id>
<content type='text'>
Add support for Lemans TLMM configuration and control via the pinctrl
framework.

Signed-off-by: Yadu MG &lt;quic_ymg@quicinc.com&gt;
Signed-off-by: Prasad Sodagudi &lt;quic_psodagud@quicinc.com&gt;
[Bartosz: made the driver ready for upstream]
Co-developed-by: Bartosz Golaszewski &lt;bartosz.golaszewski@linaro.org&gt;
Signed-off-by: Bartosz Golaszewski &lt;bartosz.golaszewski@linaro.org&gt;
Reviewed-by: Konrad Dybcio &lt;konrad.dybcio@linaro.org&gt;
Link: https://lore.kernel.org/r/20230201150011.200613-3-brgl@bgdev.pl
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
</entry>
</feed>
