<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/linux.git/drivers/pinctrl/intel/Kconfig, branch v5.10.258</title>
<subtitle>Linux kernel stable tree (mirror)</subtitle>
<id>https://git.radix-linux.su/kernel/linux.git/atom?h=v5.10.258</id>
<link rel='self' href='https://git.radix-linux.su/kernel/linux.git/atom?h=v5.10.258'/>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/'/>
<updated>2020-08-20T09:37:07+00:00</updated>
<entry>
<title>pinctrl: cherryview: Switch to use intel_pinctrl_get_soc_data()</title>
<updated>2020-08-20T09:37:07+00:00</updated>
<author>
<name>Andy Shevchenko</name>
<email>andriy.shevchenko@linux.intel.com</email>
</author>
<published>2020-07-29T11:57:08+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=10c857f063fc63902160755a6e23fa594290c6d3'/>
<id>urn:sha1:10c857f063fc63902160755a6e23fa594290c6d3</id>
<content type='text'>
Since we have common helper to retrieve SoC data from driver data
we may switch to use it.

Signed-off-by: Andy Shevchenko &lt;andriy.shevchenko@linux.intel.com&gt;
Acked-by: Mika Westerberg &lt;mika.westerberg@linux.intel.com&gt;
</content>
</entry>
<entry>
<title>pinctrl: baytrail: Switch to use intel_pinctrl_get_soc_data()</title>
<updated>2020-08-20T09:37:07+00:00</updated>
<author>
<name>Andy Shevchenko</name>
<email>andriy.shevchenko@linux.intel.com</email>
</author>
<published>2020-07-29T11:57:07+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=ce7793e9ef6322d236b722ada386d3bb7ecb7df2'/>
<id>urn:sha1:ce7793e9ef6322d236b722ada386d3bb7ecb7df2</id>
<content type='text'>
Since we have common helper to retrieve SoC data from driver data
we may switch to use it.

Signed-off-by: Andy Shevchenko &lt;andriy.shevchenko@linux.intel.com&gt;
Acked-by: Mika Westerberg &lt;mika.westerberg@linux.intel.com&gt;
</content>
</entry>
<entry>
<title>pinctrl: intel: Add Intel Emmitsburg pin controller support</title>
<updated>2020-07-21T08:44:21+00:00</updated>
<author>
<name>Andy Shevchenko</name>
<email>andriy.shevchenko@linux.intel.com</email>
</author>
<published>2020-07-16T12:42:44+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=b4f2fcb534875e2e57c96a0358267f2109d68004'/>
<id>urn:sha1:b4f2fcb534875e2e57c96a0358267f2109d68004</id>
<content type='text'>
This driver adds pinctrl/GPIO support for Intel Emmitsburg PCH. The
GPIO controller is based on the next generation GPIO hardware but still
compatible with the one supported by the Intel core pinctrl/GPIO driver.

Signed-off-by: Andy Shevchenko &lt;andriy.shevchenko@linux.intel.com&gt;
Reviewed-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
Acked-by: Mika Westerberg &lt;mika.westerberg@linux.intel.com&gt;
</content>
</entry>
<entry>
<title>pinctrl: intel: Add Intel Jasper Lake pin controller support</title>
<updated>2020-04-14T13:17:13+00:00</updated>
<author>
<name>Andy Shevchenko</name>
<email>andriy.shevchenko@linux.intel.com</email>
</author>
<published>2020-04-13T11:18:25+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=e278dcb7048b1a27b559e34b0f5f0e50f06221a2'/>
<id>urn:sha1:e278dcb7048b1a27b559e34b0f5f0e50f06221a2</id>
<content type='text'>
This driver adds pinctrl/GPIO support for Intel Jasper Lake SoC. The
GPIO controller is based on the next generation GPIO hardware but still
compatible with the one supported by the Intel core pinctrl/GPIO driver.

Cc: Mika Westerberg &lt;mika.westerberg@linux.intel.com&gt;
Signed-off-by: Andy Shevchenko &lt;andriy.shevchenko@linux.intel.com&gt;
Acked-by: Mika Westerberg &lt;mika.westerberg@linux.intel.com&gt;
</content>
</entry>
<entry>
<title>pinctrl: lynxpoint: Switch to pin control API</title>
<updated>2019-12-13T14:48:49+00:00</updated>
<author>
<name>Andy Shevchenko</name>
<email>andriy.shevchenko@linux.intel.com</email>
</author>
<published>2019-11-25T17:30:57+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=64e14e90646cafa9940cead9f7ba336c55671bf9'/>
<id>urn:sha1:64e14e90646cafa9940cead9f7ba336c55671bf9</id>
<content type='text'>
When all preparations are done, we may switch to pin control API.

Reviewed-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
Signed-off-by: Andy Shevchenko &lt;andriy.shevchenko@linux.intel.com&gt;
Acked-by: Mika Westerberg &lt;mika.westerberg@linux.intel.com&gt;
</content>
</entry>
<entry>
<title>pinctrl: lynxpoint: Move GPIO driver to pin controller folder</title>
<updated>2019-12-13T14:48:47+00:00</updated>
<author>
<name>Andy Shevchenko</name>
<email>andriy.shevchenko@linux.intel.com</email>
</author>
<published>2019-08-22T15:40:50+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=eb83479e18999e34b3b800f54aa31137f7f41c33'/>
<id>urn:sha1:eb83479e18999e34b3b800f54aa31137f7f41c33</id>
<content type='text'>
Move Lynxpoint GPIO driver under Intel pin control umbrella
for further transformation to a real pin control driver.

Reviewed-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
Signed-off-by: Andy Shevchenko &lt;andriy.shevchenko@linux.intel.com&gt;
Acked-by: Mika Westerberg &lt;mika.westerberg@linux.intel.com&gt;
</content>
</entry>
<entry>
<title>pinctrl: intel: Add Intel Tiger Lake pin controller support</title>
<updated>2019-10-30T14:05:18+00:00</updated>
<author>
<name>Andy Shevchenko</name>
<email>andriy.shevchenko@linux.intel.com</email>
</author>
<published>2019-10-21T16:45:28+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=c9ccf71fc8073b8d3a484751585088ff14c8d762'/>
<id>urn:sha1:c9ccf71fc8073b8d3a484751585088ff14c8d762</id>
<content type='text'>
This driver adds pinctrl/GPIO support for Intel Tiger Lake SoC. The
GPIO controller is based on the next generation GPIO hardware but still
compatible with the one supported by the Intel core pinctrl/GPIO driver.

Signed-off-by: Mika Westerberg &lt;mika.westerberg@linux.intel.com&gt;
Signed-off-by: Andy Shevchenko &lt;andriy.shevchenko@linux.intel.com&gt;
</content>
</entry>
<entry>
<title>pinctrl: intel: Convert to use SPDX identifier</title>
<updated>2018-07-02T13:52:10+00:00</updated>
<author>
<name>Andy Shevchenko</name>
<email>andriy.shevchenko@linux.intel.com</email>
</author>
<published>2018-06-29T12:36:34+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=875a92b3f58a117842c0f9e8d65355c6be218fa2'/>
<id>urn:sha1:875a92b3f58a117842c0f9e8d65355c6be218fa2</id>
<content type='text'>
Reduce size of duplicated comments by switching to use SPDX identifier.

No functional change.

Signed-off-by: Andy Shevchenko &lt;andriy.shevchenko@linux.intel.com&gt;
Acked-by: Mika Westerberg &lt;mika.westerberg@linux.intel.com&gt;
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
</entry>
<entry>
<title>pinctrl: intel: Add Ice Lake PCH pin controller support</title>
<updated>2018-06-29T12:51:26+00:00</updated>
<author>
<name>Andy Shevchenko</name>
<email>andriy.shevchenko@linux.intel.com</email>
</author>
<published>2018-06-27T12:05:53+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=e6800d2601fafb51f5feb3c216c884c2efb4c77d'/>
<id>urn:sha1:e6800d2601fafb51f5feb3c216c884c2efb4c77d</id>
<content type='text'>
This adds pinctrl/GPIO support for Intel Ice Lake PCH. The Ice Lake PCH
GPIO is based on the same version of the Intel GPIO hardware than Intel
Cannon Lake with different set of pins and ACPI ID.

Signed-off-by: Andy Shevchenko &lt;andriy.shevchenko@linux.intel.com&gt;
Signed-off-by: Mika Westerberg &lt;mika.westerberg@linux.intel.com&gt;
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
</entry>
<entry>
<title>pinctrl: intel: Add Intel Cedar Fork PCH pin controller support</title>
<updated>2017-10-31T09:11:21+00:00</updated>
<author>
<name>Mika Westerberg</name>
<email>mika.westerberg@linux.intel.com</email>
</author>
<published>2017-10-23T12:40:26+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=0f80dbc133e3ebf82766b5276d8d0fe998a6f0db'/>
<id>urn:sha1:0f80dbc133e3ebf82766b5276d8d0fe998a6f0db</id>
<content type='text'>
Intel Cedar Fork PCH is the successor of Intel Denverton PCH but it is
based on the newer GPIO/pinctrl hardware block. Add a new pinctrl/GPIO
driver to support it.

Signed-off-by: Mika Westerberg &lt;mika.westerberg@linux.intel.com&gt;
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
</entry>
</feed>
