kernel/linux.git/drivers/pinctrl/aspeed, branch linux-4.20.y

pinctrl: remove unnecessary unlikely()

2018-08-31T09:29:12+00:00

WARN_ON() already contains an unlikely(), so it's not necessary to wrap it into another. Signed-off-by: Igor Stoppa Cc: Andrew Jeffery Cc: Linus Walleij Signed-off-by: Linus Walleij

pinctrl: aspeed: Fix documentation

2018-06-28T14:13:12+00:00

Fixes these warnings: pinctrl-aspeed.c:112: warning: Function parameter or member 'map' not described in 'aspeed_sig_desc_eval' pinctrl-aspeed.c:112: warning: Excess function parameter 'regmap' description in 'aspeed_sig_desc_eval' Signed-off-by: Joel Stanley Reviewed-by: Andrew Jeffery Signed-off-by: Linus Walleij

pinctrl: aspeed: Rework strap register write logic for the AST2500

2017-08-31T11:39:38+00:00

Yong Li found that writes to the AST2500 strapping register were not properly supported by the Aspeed pinctrl core and provided a patch to rectify the problem. Several revisions of the patch were posted and ultimately v4 should have been applied, however some unfortunate liberal application of tags on my part lead to confusion between v3[1] and v4[2]. Generate the diff between v3 and v4 to apply as a fixup patch. [1] http://patchwork.ozlabs.org/patch/801662/ [2] http://patchwork.ozlabs.org/patch/802946/ Cc: Yong Li Signed-off-by: Andrew Jeffery Signed-off-by: Linus Walleij

pinctrl: aspeed: Fix ast2500 strap register write logic

2017-08-22T12:51:44+00:00

On AST2500, the hardware strap register(SCU70) only accepts write ‘1’, to clear it to ‘0’, must set bits(write ‘1’) to SCU7C Signed-off-by: Yong Li Reviewed-by: Andrew Jeffery Tested-by: Andrew Jeffery Signed-off-by: Linus Walleij

pinctrl: aspeed: g5: constify pinconf_ops, pinctrl_ops, and pinmux_ops structures

2017-08-22T12:40:25+00:00

These structures are only stored in fields of a pinctrl_desc structure (confops, pctlops, and pmxops) that are const. Make the structures const as well. Done with the help of Coccinelle. Signed-off-by: Julia Lawall Signed-off-by: Linus Walleij

pinctrl: aspeed: g4: constify pinconf_ops, pinctrl_ops, and pinmux_ops structures

2017-08-22T12:40:06+00:00

These structures are only stored in fields of a pinctrl_desc structure (pctlops, and pmxops) that are const. Make the structures const as well. Done with the help of Coccinelle. Signed-off-by: Julia Lawall Signed-off-by: Linus Walleij

pinctrl: aspeed: g5: Add USB device and host support

2017-08-14T13:01:01+00:00

Implement the AST2500 USB functions as described by the devicetree bindings. The AST2500 exposes five USB controllers through two USB ports. Similar to the AST2400, the pins exposing USB are outliers with respect to the rest of the pinmux as they not capable of GPIO. Signed-off-by: Andrew Jeffery Signed-off-by: Linus Walleij

pinctrl: aspeed: g4: Add USB device and host support

2017-08-14T13:01:01+00:00

Implement the AST2400 USB functions as described by the devicetree bindings. Three ports are fully documented in the datasheet and exposed through the bindings and pinctrl, though there are remnants of documentation for a fourth port muxed with GPIO pins GPIOQ6 and GPIOQ7. The implementation is updated to reflect this but the function and group are not exposed. Disregarding the mostly undocumented fourth port, the USB functions are an outlier with respect to the rest of the muxed functionality on the AST2400 as GPIO is not supported on these pins. Signed-off-by: Andrew Jeffery Signed-off-by: Linus Walleij

pinctrl: aspeed: g5: Add pinconf support

2017-04-24T12:55:50+00:00

Testing for pinctrl-aspeed-g5 was performed on an AST2500EVB system, using the strategy outlined in the commit message for the change to the Aspeed pinctrl core. Signed-off-by: Andrew Jeffery Signed-off-by: Linus Walleij

pinctrl: aspeed: g4: Add pinconf support

2017-04-24T12:55:03+00:00

Testing for pinctrl-aspeed-g4 was performed on an OpenPOWER Palmetto system, using the strategy outlined in the commit message for the change to the Aspeed pinctrl core. Signed-off-by: Andrew Jeffery Signed-off-by: Linus Walleij