<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/linux.git/drivers/pinctrl/Makefile, branch v7.2-rc1</title>
<subtitle>Linux kernel stable tree (mirror)</subtitle>
<id>https://git.radix-linux.su/kernel/linux.git/atom?h=v7.2-rc1</id>
<link rel='self' href='https://git.radix-linux.su/kernel/linux.git/atom?h=v7.2-rc1'/>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/'/>
<updated>2026-06-11T13:02:35+00:00</updated>
<entry>
<title>pinctrl: ultrarisc: Add UltraRISC DP1000 pinctrl driver</title>
<updated>2026-06-11T13:02:35+00:00</updated>
<author>
<name>Jia Wang</name>
<email>wangjia@ultrarisc.com</email>
</author>
<published>2026-06-10T05:29:56+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=cb7037924836a352e767f69f1aa65b82f3e815f4'/>
<id>urn:sha1:cb7037924836a352e767f69f1aa65b82f3e815f4</id>
<content type='text'>
Add support for the pin controller on the UltraRISC DP1000 SoC.

The controller provides mux selection for pins in ports A, B, C, D, and
LPC. Ports A-D default to GPIO and support peripheral muxing. LPC pins
can be switched to eSPI, but are not available as GPIOs. Basic pin
configuration controls such as drive strength, pull-up, and pull-down
are also supported.

Signed-off-by: Jia Wang &lt;wangjia@ultrarisc.com&gt;
Reviewed-by: Bartosz Golaszewski &lt;bartosz.golaszewski@oss.qualcomm.com&gt;
Signed-off-by: Linus Walleij &lt;linusw@kernel.org&gt;
</content>
</entry>
<entry>
<title>pinctrl: Move Airoha driver to dedicated directory</title>
<updated>2026-06-08T08:15:16+00:00</updated>
<author>
<name>Christian Marangi</name>
<email>ansuelsmth@gmail.com</email>
</author>
<published>2026-06-05T07:12:31+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=27aa791db7e7fe9e405a2143f2ddccdcd0d1c283'/>
<id>urn:sha1:27aa791db7e7fe9e405a2143f2ddccdcd0d1c283</id>
<content type='text'>
In preparation for additional SoC support, move the Airoha pinctrl driver
for AN7581 SoC to a dedicated directory.

This is to tidy things up and keep code organized without polluting the
Mediatek driver directory.

The driver doesn't depend on any generic or common code from the Mediatek
codebase so it can be safely moved without any modification.

Signed-off-by: Christian Marangi &lt;ansuelsmth@gmail.com&gt;
Acked-by: Lorenzo Bianconi &lt;lorenzo@kernel.org&gt;
Signed-off-by: Linus Walleij &lt;linusw@kernel.org&gt;
</content>
</entry>
<entry>
<title>Merge branch 'ib-mux-pinctrl' into devel</title>
<updated>2026-05-11T20:33:30+00:00</updated>
<author>
<name>Linus Walleij</name>
<email>linusw@kernel.org</email>
</author>
<published>2026-05-11T20:33:30+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=42ec31ec8df4675af621ec686db7410153beebfd'/>
<id>urn:sha1:42ec31ec8df4675af621ec686db7410153beebfd</id>
<content type='text'>
</content>
</entry>
<entry>
<title>pinctrl: add generic board-level pinctrl driver using mux framework</title>
<updated>2026-05-05T12:48:55+00:00</updated>
<author>
<name>Frank Li</name>
<email>Frank.Li@nxp.com</email>
</author>
<published>2026-05-04T23:54:39+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=34acc5a8adfb76f2de63c8b8317397fb72b0aec8'/>
<id>urn:sha1:34acc5a8adfb76f2de63c8b8317397fb72b0aec8</id>
<content type='text'>
Many boards use on-board mux chips (often controlled by GPIOs from an I2C
expander) to switch shared signals between peripherals.

Add a generic pinctrl driver built on top of the mux framework to
centralize mux handling and avoid probe ordering issues. Keep board-level
routing out of individual drivers and supports boot-time only mux
selection.

Ensure correct probe ordering, especially when the GPIO expander is probed
later.

Signed-off-by: Frank Li &lt;Frank.Li@nxp.com&gt;
Signed-off-by: Linus Walleij &lt;linusw@kernel.org&gt;
</content>
</entry>
<entry>
<title>pinctrl: vt8500: Enable compile testing</title>
<updated>2026-04-28T09:09:41+00:00</updated>
<author>
<name>Krzysztof Kozlowski</name>
<email>krzysztof.kozlowski@oss.qualcomm.com</email>
</author>
<published>2026-04-10T13:04:58+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=93d8c6c0e1879d098ff478511032b42a6b26aae0'/>
<id>urn:sha1:93d8c6c0e1879d098ff478511032b42a6b26aae0</id>
<content type='text'>
Enable compile testing for Realtek pin controller drivers for increased
build and static checkers coverage.  PINCTRL_WMT uses
gpiochip_get_data(), thus needs GPIOLIB.

Signed-off-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@oss.qualcomm.com&gt;
Signed-off-by: Linus Walleij &lt;linusw@kernel.org&gt;
</content>
</entry>
<entry>
<title>pinctrl: aspeed: Enable compile testing outside of ARCH_ASPEED</title>
<updated>2026-04-28T09:09:41+00:00</updated>
<author>
<name>Krzysztof Kozlowski</name>
<email>krzysztof.kozlowski@oss.qualcomm.com</email>
</author>
<published>2026-04-10T13:04:57+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=0e6ba181b7982bd82a92698d2c8eec621d4eef9d'/>
<id>urn:sha1:0e6ba181b7982bd82a92698d2c8eec621d4eef9d</id>
<content type='text'>
Since inception in commit 4d3d0e4272d8 ("pinctrl: Add core support for
Aspeed SoCs"), the Aspeed pin controller drivers cannot be compile
tested, unless ARCH_ASPEED is selected.  .  That partially defeats the
purpose of compile testing, since ARCH_ASPEED is pulled when building
platform kernels.

Signed-off-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@oss.qualcomm.com&gt;
Signed-off-by: Linus Walleij &lt;linusw@kernel.org&gt;
</content>
</entry>
<entry>
<title>pinctrl: realtek: Enable compile testing</title>
<updated>2026-04-28T09:09:41+00:00</updated>
<author>
<name>Krzysztof Kozlowski</name>
<email>krzysztof.kozlowski@oss.qualcomm.com</email>
</author>
<published>2026-04-10T13:04:56+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=32ba46cede2807215d6c503f27cf554226ecaa9f'/>
<id>urn:sha1:32ba46cede2807215d6c503f27cf554226ecaa9f</id>
<content type='text'>
Enable compile testing for Realtek pin controller drivers for increased
build and static checkers coverage.  PINCTRL_RTD uses
pinconf_generic_dt_node_to_map(), thus needs OF.

Signed-off-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@oss.qualcomm.com&gt;
Reviewed-by: Yu-Chun Lin &lt;eleanor.lin@realtek.com&gt;
Signed-off-by: Linus Walleij &lt;linusw@kernel.org&gt;
</content>
</entry>
<entry>
<title>pinctrl: tegra: Enable easier compile testing</title>
<updated>2026-04-28T09:08:48+00:00</updated>
<author>
<name>Krzysztof Kozlowski</name>
<email>krzysztof.kozlowski@oss.qualcomm.com</email>
</author>
<published>2026-04-10T10:30:06+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=38eec41ded8621c75e5772af5fccde906fcd8276'/>
<id>urn:sha1:38eec41ded8621c75e5772af5fccde906fcd8276</id>
<content type='text'>
Currently NVIDIA Tegra pin controller drivers cannot be compile tested,
unless ARCH_TEGRA is selected.  That partially defeats the purpose of
compile testing, since ARCH_TEGRA is pulled when building platform
kernels.  Solve it and allow compile testing independently of ARCH_TEGRA
choice which requires few less usual changes:

1. Descent in Makefile in to drivers/pinctrl/tegra/ unconditionally,
   because there is no menu option.

2. Depend on COMMON_CLK for PINCTRL_TEGRA20, because it uses
   clk_register_mux().

Signed-off-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@oss.qualcomm.com&gt;
Signed-off-by: Linus Walleij &lt;linusw@kernel.org&gt;
</content>
</entry>
<entry>
<title>pinctrl: add generic functions + pins mapper</title>
<updated>2026-01-21T12:13:37+00:00</updated>
<author>
<name>Conor Dooley</name>
<email>conor.dooley@microchip.com</email>
</author>
<published>2026-01-20T18:15:40+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=43722575e5cdcc6c457bfe81fae9c3ad343ea031'/>
<id>urn:sha1:43722575e5cdcc6c457bfe81fae9c3ad343ea031</id>
<content type='text'>
Add a generic function to allow creation of groups and functions at
runtime based on devicetree content, before setting up mux mappings.
It works similarly to pinconf_generic_dt_node_to_map(), and
therefore parses pinconf properties and maps those too, allowing it
to be used as the dt_node_to_map member of the pinctrl_ops struct.

Signed-off-by: Conor Dooley &lt;conor.dooley@microchip.com&gt;
Signed-off-by: Linus Walleij &lt;linusw@kernel.org&gt;
</content>
</entry>
<entry>
<title>pinctrl: move microchip riscv pinctrl drivers to a folder</title>
<updated>2026-01-21T12:13:37+00:00</updated>
<author>
<name>Conor Dooley</name>
<email>conor.dooley@microchip.com</email>
</author>
<published>2026-01-20T18:15:39+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=95c1762aaf34b0d5d128f5c14a82826499c563a3'/>
<id>urn:sha1:95c1762aaf34b0d5d128f5c14a82826499c563a3</id>
<content type='text'>
There's three of these drivers now for the same platforms, move them
together with other microchip drivers to follow.

Signed-off-by: Conor Dooley &lt;conor.dooley@microchip.com&gt;
Signed-off-by: Linus Walleij &lt;linusw@kernel.org&gt;
</content>
</entry>
</feed>
