kernel/linux.git/drivers/pinctrl/Makefile, branch v6.6.132

pinctrl: pinctrl-oxnas: remove obsolete pinctrl driver

2023-08-15T09:06:32+00:00

Due to lack of maintenance and stall of development for a few years now, and since no new features will ever be added upstream, remove support for OX810 and OX820 pinctrl & gpio. Acked-by: Linus Walleij Acked-by: Arnd Bergmann Acked-by: Daniel Golle Acked-by: Andy Shevchenko Signed-off-by: Neil Armstrong Link: https://lore.kernel.org/r/20230814-topic-oxnas-upstream-remove-v3-1-04a0c5cdda52@linaro.org Signed-off-by: Linus Walleij

pinctrl: qcom: allow true compile testing

2023-06-09T07:05:36+00:00

Makefile selected Qualcomm pinctrl drivers only for ARCH_QCOM, making any COMPILE_TEST options inside Kconfig ((ARCH_QCOM || COMPILE_TEST) or (OF || COMPILE_TEST)) not effective. Always descent to the qcom subdirectory to fix this. All individual drivers are selected in Makefile via dedicated CONFIG entries, thus this should not have functional impact except when compile testing. Signed-off-by: Krzysztof Kozlowski Reviewed-by: Konrad Dybcio Link: https://lore.kernel.org/r/20230601152026.1182648-6-krzysztof.kozlowski@linaro.org Signed-off-by: Linus Walleij

pinctrl: Remove Intel Thunder Bay pinctrl driver

2023-04-04T13:50:58+00:00

Remove Thunder Bay specific code as the product got cancelled and there are no end customers or users. Signed-off-by: Lakshmi Sowjanya D Link: https://lore.kernel.org/r/20230403120235.939-1-lakshmi.sowjanya.d@intel.com Signed-off-by: Linus Walleij

pinctrl: mlxbf3: Add pinctrl driver support

2023-03-19T21:07:21+00:00

NVIDIA BlueField-3 SoC has a few pins that can be used as GPIOs or take the default hardware functionality. Add a driver for the pin muxing. Signed-off-by: Asmaa Mnebhi Reviewed-by: Andy Shevchenko Link: https://lore.kernel.org/r/20230315215027.30685-3-asmaa@nvidia.com Signed-off-by: Linus Walleij

pinctrl: ralink: move to mediatek as mtmips

2023-03-19T20:47:25+00:00

This platform from Ralink was acquired by MediaTek in 2011. Then, MediaTek introduced new SoCs which utilise this platform. Move the driver to mediatek pinctrl directory. Rename the ralink core driver to mtmips. Signed-off-by: Arınç ÜNAL Link: https://lore.kernel.org/r/20230317213011.13656-5-arinc.unal@arinc9.com Signed-off-by: Linus Walleij

pinctrl: add NXP S32 SoC family support

2023-03-06T13:27:15+00:00

Add the pinctrl driver for NXP S32 SoC family. This driver is mainly based on NXP's downstream implementation on nxp-auto-linux repo[1]. [1] https://github.com/nxp-auto-linux/linux/tree/bsp35.0-5.15.73-rt/drivers/pinctrl/freescale Signed-off-by: Matthew Nunez Signed-off-by: Phu Luu An Signed-off-by: Stefan-Gabriel Mirea Signed-off-by: Larisa Grigore Signed-off-by: Ghennadi Procopciuc Signed-off-by: Andrei Stefanescu Signed-off-by: Radu Pirea Signed-off-by: Chester Lin Link: https://lore.kernel.org/r/20230220023320.3499-3-clin@suse.com Signed-off-by: Linus Walleij

pinctrl: pinctrl-loongson2: add pinctrl driver support

2022-11-17T09:24:08+00:00

The Loongson-2 SoC has a few pins that can be used as GPIOs or take multiple other functions. Add a driver for the pinmuxing. There is currently no support for GPIO pin pull-up and pull-down. Signed-off-by: zhanghongchen Co-developed-by: Yinbo Zhu Signed-off-by: Yinbo Zhu Link: https://lore.kernel.org/r/20221114024942.8111-1-zhuyinbo@loongson.cn Signed-off-by: Linus Walleij

pinctrl: Create subdirectory for StarFive drivers

2022-10-04T08:42:11+00:00

Move the StarFive JH7100 pinctrl driver to a new subdirectory in preparation for adding more StarFive pinctrl drivers. No functional change. Signed-off-by: Jianlong Huang Signed-off-by: Hal Feng Link: https://lore.kernel.org/r/20220930060819.5320-1-hal.feng@linux.starfivetech.com Signed-off-by: Linus Walleij

pinctrl: Add Cypress cy8c95x0 support

2022-08-24T22:24:32+00:00

Add support for cypress I2C GPIO expanders cy8c9520, cy8c9540 and cy8c9560. The GPIO expanders feature a PWM mode, thus add it as pinctrl driver. The chip features multiple drive modes for each pin when configured as output and multiple bias settings when configured as input. Tested all three components and verified that all functionality is fully working. Datasheet: https://www.cypress.com/file/37971/download Signed-off-by: Patrick Rudolph Signed-off-by: Naresh Solanki Link: https://lore.kernel.org/r/20220816054917.7893-3-patrick.rudolph@9elements.com Signed-off-by: Linus Walleij

pinctrl: nuvoton: Add driver for WPCM450

2022-03-15T00:16:20+00:00

This driver is based on the one for NPCM7xx, because the WPCM450 is a predecessor of those SoCs. Notable differences: - On WPCM450, the GPIO registers are not organized in multiple banks, but rather placed continually into the same register block. This affects how register offsets are computed. - Pinmux nodes can explicitly select GPIO mode, whereas in the npcm7xx driver, this happens automatically when a GPIO is requested. Some functionality implemented in the hardware was (for now) left unused in the driver, specifically blinking and pull-up/down. Signed-off-by: Jonathan Neuschäfer Reported-by: kernel test robot Link: https://lore.kernel.org/r/20220129115228.2257310-6-j.neuschaefer@gmx.net Signed-off-by: Linus Walleij