kernel/linux.git/drivers/phy, branch v5.10.268

phy: zynqmp: keep SERDES scrambler and 8b/10b enabled for USB

2026-08-19T15:12:09+00:00

commit 7eb61caf45607e1e1270f51f8f93f0ded53146da upstream. USB Gen1 requires scrambling and 8b/10b encoding to be performed in the physical layer. Do not bypass PHY-side scrambler or encoder/decoder for USB operation, as mandated by the USB 3.x specification. Scrambler and 8b/10b bypass remain restricted to SATA and SGMII modes, where encoding is handled in the controller. Fixes: 4a33bea00314 ("phy: zynqmp: Add PHY driver for the Xilinx ZynqMP Gigabit Transceiver") Cc: stable@vger.kernel.org Signed-off-by: Nava kishore Manne Signed-off-by: Radhey Shyam Pandey Acked-by: Michal Simek Link: https://patch.msgid.link/20260627155229.2791113-4-radhey.shyam.pandey@amd.com Signed-off-by: Vinod Koul Signed-off-by: Greg Kroah-Hartman

phy: zynqmp: use read-modify-write for SERDES scrambler bypass

2026-08-19T15:12:09+00:00

commit 21e0749f931702765b9d52d05740092bc87fcd8d upstream. xpsgtr_bypass_scrambler_8b10b() used xpsgtr_write_phy() which performs a full register write, silently clearing any bits beyond the intended bypass control fields. Switch to xpsgtr_clr_set_phy() with clr=mask, set=mask to set only the bypass bits while preserving the remaining bits in each register. Fixes: 4a33bea00314 ("phy: zynqmp: Add PHY driver for the Xilinx ZynqMP Gigabit Transceiver") Cc: stable@vger.kernel.org Signed-off-by: Nava kishore Manne Signed-off-by: Radhey Shyam Pandey Acked-by: Michal Simek Link: https://patch.msgid.link/20260627155229.2791113-3-radhey.shyam.pandey@amd.com Signed-off-by: Vinod Koul Signed-off-by: Greg Kroah-Hartman

phy: zynqmp: fix L0_TM_DISABLE_SCRAMBLE_ENCODER mask

2026-08-19T15:12:09+00:00

commit 6cb22477929489a412df8d153e550e77a012e701 upstream. The L0_TX_DIG_61 register bit 2 is a reserved read-only field. The previous mask value 0x0f incorrectly included bit 2, causing unintended writes to a reserved bit on every scrambler bypass operation. Correct the mask to (BIT(3) | GENMASK(1, 0)) to cover only the valid scramble bypass control bits. Fixes: 4a33bea00314 ("phy: zynqmp: Add PHY driver for the Xilinx ZynqMP Gigabit Transceiver") Cc: stable@vger.kernel.org Signed-off-by: Nava kishore Manne Signed-off-by: Radhey Shyam Pandey Acked-by: Michal Simek Link: https://patch.msgid.link/20260627155229.2791113-2-radhey.shyam.pandey@amd.com Signed-off-by: Vinod Koul Signed-off-by: Greg Kroah-Hartman

phy: tegra: xusb: Fix per-pad high-speed termination calibration

2026-06-19T11:21:46+00:00

[ Upstream commit da110228b54f2e2143d97ea7151e0dc22e539d67 ] The existing code reads a single hs_term_range_adj value from bit field [10:7] of FUSE_SKU_CALIB_0 and applies it to all USB2 pads uniformly. However, on SoCs that support per-pad termination, each pad has its own hs_term_range_adj field: pad 0 in FUSE_SKU_CALIB_0[10:7], and pads 1-3 in FUSE_USB_CALIB_EXT_0 at bit offsets [8:5], [12:9], and [16:13] respectively. Fix the calibration by reading per-pad values from the appropriate fuse registers. For SoCs that do not support per-pad termination, replicate pad 0's value to all pads to maintain existing behavior. Add a has_per_pad_term flag to the SoC data to indicate whether per-pad termination values are available in FUSE_USB_CALIB_EXT_0. Fixes: 1ef535c6ba8e ("phy: tegra: xusb: Add Tegra194 support") Cc: stable@vger.kernel.org Signed-off-by: Wayne Chang Signed-off-by: Wei-Cheng Chen Reviewed-by: Jon Hunter Tested-by: Jon Hunter Link: https://patch.msgid.link/20260504033305.2283145-1-weichengc@nvidia.com Signed-off-by: Vinod Koul Signed-off-by: Sasha Levin Signed-off-by: Greg Kroah-Hartman

phy: tegra: xusb: Disable trk clk when not in use

2026-06-19T11:21:46+00:00

[ Upstream commit 71d9e899584e11bbd7eaf9934a619c69a15060d8 ] Pad tracking is a one-time calibration for Tegra186 and Tegra194. Clk should be disabled after calibration. Disable clk after calibration. While at it add 100us delay for HW recording the calibration value. Signed-off-by: Wayne Chang Signed-off-by: Jon Hunter Link: https://lore.kernel.org/r/20230111110450.24617-5-jonathanh@nvidia.com Signed-off-by: Greg Kroah-Hartman Stable-dep-of: da110228b54f ("phy: tegra: xusb: Fix per-pad high-speed termination calibration") Signed-off-by: Sasha Levin Signed-off-by: Greg Kroah-Hartman

phy: renesas: rcar-gen3-usb2: Fix the use of msleep during spinlock

2026-06-19T11:21:24+00:00

This fixes an issue caused by the use of msleep during spinlock. In the original commit, msleep was changed to mdelay, but this fix was not carried over during the backport to 5.10.y tree. This is a backporting error, so no fix is needed in the upstream. ``` [ 62.677594] BUG: scheduling while atomic: kworker/1:2/126/0x00000002 [ 62.683957] Modules linked in: [ 62.687014] CPU: 1 PID: 126 Comm: kworker/1:2 Not tainted 5.10.253 #1 [ 62.693447] Hardware name: HopeRun HiHope RZ/G2M with sub board (DT) [ 62.699812] Workqueue: events deferred_probe_work_func [ 62.704948] Call trace: [ 62.707397] dump_backtrace+0x0/0x1c0 [ 62.711058] show_stack+0x18/0x40 [ 62.714375] dump_stack+0xe8/0x124 [ 62.717776] __schedule_bug+0x54/0x70 [ 62.721436] __schedule+0x6b4/0x710 [ 62.724920] schedule+0x70/0x104 [ 62.728145] schedule_timeout+0x80/0xf0 [ 62.728153] msleep+0x30/0x44 [ 62.728165] rcar_gen3_phy_usb2_init+0x180/0x1e0 [ 62.736946] phy_init+0x64/0x100 [ 62.736955] usb_phy_roothub_init+0x48/0xa0 [ 62.736962] usb_add_hcd+0x54/0x6c0 [ 62.736974] ehci_platform_probe+0x1ec/0x4b0 [ 62.744541] platform_drv_probe+0x54/0xac [ 62.744548] really_probe+0xec/0x4f0 [ 62.744552] driver_probe_device+0x58/0xec [ 62.744556] __device_attach_driver+0xb8/0x120 [ 62.744562] bus_for_each_drv+0x78/0xd0 [ 62.744568] __device_attach+0xa8/0x1c0 [ 62.744575] device_initial_probe+0x14/0x20 [ 62.752315] bus_probe_device+0x9c/0xa4 [ 62.752319] deferred_probe_work_func+0x88/0xc0 [ 62.752327] process_one_work+0x1cc/0x370 [ 62.759977] worker_thread+0x218/0x480 [ 62.759984] kthread+0x154/0x160 [ 62.759990] ret_from_fork+0x10/0x18 [ 62.760115] ehci-platform ee080100.usb: EHCI Host Controller [ 62.839982] ehci-platform ee080100.usb: new USB bus registered, assigned bus number 3 ``` Fixes: 0f86a559900f ("phy: renesas: rcar-gen3-usb2: Lock around hardware registers and driver data") Cc: stable@vger.kernel.org Cc: Claudiu Beznea Cc: Sasha Levin Signed-off-by: Nobuhiro Iwamatsu Signed-off-by: Sasha Levin

phy: marvell: mvebu-a3700-utmi: fix incorrect USB2_PHY_CTRL register access

2026-06-01T15:29:56+00:00

[ Upstream commit 91ddf6f722084383fb05be731c0107814b055c0c ] The mvebu_a3700_utmi_phy_power_off() function tries to modify the USB2_PHY_CTRL register by using the IO address of the PHY IP block along with the readl/writel IO accessors. However, the register exist in the USB miscellaneous register space, and as such it must be accessed via regmap like it is done in the mvebu_a3700_utmi_phy_power_on() function. Change the code to use regmap_update_bits() for modífying the register to fix this. Fixes: cc8b7a0ae866 ("phy: add A3700 UTMI PHY driver") Signed-off-by: Gabor Juhos Reviewed-by: Miquel Raynal Link: https://patch.msgid.link/20260321-a3700-utmi-fix-usb2_phy_ctrl-access-v1-1-6005ff4b5058@gmail.com Signed-off-by: Vinod Koul Signed-off-by: Sasha Levin

phy: renesas: rcar-gen3-usb2: Assert PLL reset on PHY power off

2026-04-18T08:31:12+00:00

commit 9ce71e85b29eb63e48e294479742e670513f03a0 upstream. Assert PLL reset on PHY power off. This saves power. [claudiu.beznea: fixed conflict in rcar_gen3_phy_usb2_power_off() by using spin_lock_irqsave()/spin_unlock_irqrestore() instead of scoped_guard()] Fixes: f3b5a8d9b50d ("phy: rcar-gen3-usb2: Add R-Car Gen3 USB2 PHY driver") Cc: stable@vger.kernel.org Reviewed-by: Yoshihiro Shimoda Tested-by: Yoshihiro Shimoda Reviewed-by: Lad Prabhakar Signed-off-by: Claudiu Beznea Link: https://lore.kernel.org/r/20250507125032.565017-5-claudiu.beznea.uj@bp.renesas.com Signed-off-by: Vinod Koul Signed-off-by: Claudiu Beznea Signed-off-by: Sasha Levin

phy: renesas: rcar-gen3-usb2: Lock around hardware registers and driver data

2026-04-18T08:31:12+00:00

commit 55a387ebb9219cbe4edfa8ba9996ccb0e7ad4932 upstream. The phy-rcar-gen3-usb2 driver exposes four individual PHYs that are requested and configured by PHY users. The struct phy_ops APIs access the same set of registers to configure all PHYs. Additionally, PHY settings can be modified through sysfs or an IRQ handler. While some struct phy_ops APIs are protected by a driver-wide mutex, others rely on individual PHY-specific mutexes. This approach can lead to various issues, including: 1/ the IRQ handler may interrupt PHY settings in progress, racing with hardware configuration protected by a mutex lock 2/ due to msleep(20) in rcar_gen3_init_otg(), while a configuration thread suspends to wait for the delay, another thread may try to configure another PHY (with phy_init() + phy_power_on()); re-running the phy_init() goes to the exact same configuration code, re-running the same hardware configuration on the same set of registers (and bits) which might impact the result of the msleep for the 1st configuring thread 3/ sysfs can configure the hardware (though role_store()) and it can still race with the phy_init()/phy_power_on() APIs calling into the drivers struct phy_ops To address these issues, add a spinlock to protect hardware register access and driver private data structures (e.g., calls to rcar_gen3_is_any_rphy_initialized()). Checking driver-specific data remains necessary as all PHY instances share common settings. With this change, the existing mutex protection is removed and the cleanup.h helpers are used. While at it, to keep the code simpler, do not skip regulator_enable()/regulator_disable() APIs in rcar_gen3_phy_usb2_power_on()/rcar_gen3_phy_usb2_power_off() as the regulators enable/disable operations are reference counted anyway. [claudiu.beznea: - in rcar_gen3_init_otg(): fixed conflict by droppping ch->soc_no_adp_ctrl check - in rcar_gen3_phy_usb2_irq() use spin_lock()/spin_unlock() as scoped_guard() is not avaialable in v5.10 - in probe(): replace mutex_init() with spin_lock_init() - rcar_gen3_phy_usb2_power_off() replaced scoped_guard() as it is not available in v5.10 - in rcar_gen3_phy_usb2_power_on() droppped guard to avoid compilation warning "ISO C90 forbids mixed declarations and code"] Fixes: f3b5a8d9b50d ("phy: rcar-gen3-usb2: Add R-Car Gen3 USB2 PHY driver") Cc: stable@vger.kernel.org Reviewed-by: Yoshihiro Shimoda Tested-by: Yoshihiro Shimoda Reviewed-by: Lad Prabhakar Signed-off-by: Claudiu Beznea Link: https://lore.kernel.org/r/20250507125032.565017-4-claudiu.beznea.uj@bp.renesas.com Signed-off-by: Vinod Koul Signed-off-by: Claudiu Beznea Signed-off-by: Sasha Levin

phy: renesas: rcar-gen3-usb2: Move IRQ request in probe

2026-04-18T08:31:12+00:00

commit de76809f60cc938d3580bbbd5b04b7d12af6ce3a upstream. Commit 08b0ad375ca6 ("phy: renesas: rcar-gen3-usb2: move IRQ registration to init") moved the IRQ request operation from probe to struct phy_ops::phy_init API to avoid triggering interrupts (which lead to register accesses) while the PHY clocks (enabled through runtime PM APIs) are not active. If this happens, it results in a synchronous abort. One way to reproduce this issue is by enabling CONFIG_DEBUG_SHIRQ, which calls free_irq() on driver removal. Move the IRQ request and free operations back to probe, and take the runtime PM state into account in IRQ handler. This commit is preparatory for the subsequent fixes in this series. [claudiu.beznea: fixed conflicts by: - dropping irq and obint_enable_bits members of rcar_gen3_chan - using USB2_OBINT_BITS marco in rcar_gen3_phy_usb2_irq() - keeping irq local variable in rcar_gen3_phy_usb2_probe() - dropping channel->irq and channel->obint_enable_bits asssignement from probe - keeping platform_set_drvdata() and channel->dev assignment in probe] Reviewed-by: Yoshihiro Shimoda Tested-by: Yoshihiro Shimoda Reviewed-by: Lad Prabhakar Signed-off-by: Claudiu Beznea Link: https://lore.kernel.org/r/20250507125032.565017-3-claudiu.beznea.uj@bp.renesas.com Signed-off-by: Vinod Koul Signed-off-by: Claudiu Beznea Signed-off-by: Sasha Levin