kernel/linux.git/drivers/phy/ti, branch linux-5.11.y

phy: ti: j721e-wiz: Delete "clk_div_sel" clk provider during cleanup

2021-05-14T08:49:42+00:00

[ Upstream commit 7e52a39f1942b771213678c56002ce90a2f126d2 ] commit 091876cc355d ("phy: ti: j721e-wiz: Add support for WIZ module present in TI J721E SoC") modeled both MUX clocks and DIVIDER clocks in wiz. However during cleanup, it removed only the MUX clock provider. Remove the DIVIDER clock provider here. Fixes: 091876cc355d ("phy: ti: j721e-wiz: Add support for WIZ module present in TI J721E SoC") Signed-off-by: Kishon Vijay Abraham I Link: https://lore.kernel.org/r/20210310120840.16447-3-kishon@ti.com Signed-off-by: Vinod Koul Signed-off-by: Sasha Levin

phy: ti: j721e-wiz: Invoke wiz_init() before of_platform_device_create()

2021-05-14T08:49:25+00:00

commit f7eb147d306ad2efae6837e20d2944f03be42eb4 upstream. Invoke wiz_init() before configuring anything else in Sierra/Torrent (invoked as part of of_platform_device_create()). wiz_init() resets the SERDES device and any configuration done in the probe() of Sierra/Torrent will be lost. In order to prevent SERDES configuration from getting reset, invoke wiz_init() immediately before invoking of_platform_device_create(). Fixes: 091876cc355d ("phy: ti: j721e-wiz: Add support for WIZ module present in TI J721E SoC") Signed-off-by: Kishon Vijay Abraham I Reviewed-by: Swapnil Jakhade Cc: # v5.10 Link: https://lore.kernel.org/r/20210319124128.13308-3-kishon@ti.com Signed-off-by: Vinod Koul Signed-off-by: Greg Kroah-Hartman

phy: phy-twl4030-usb: Fix possible use-after-free in twl4030_usb_remove()

2021-05-12T06:37:17+00:00

[ Upstream commit e1723d8b87b73ab363256e7ca3af3ddb75855680 ] This driver's remove path calls cancel_delayed_work(). However, that function does not wait until the work function finishes. This means that the callback function may still be running after the driver's remove function has finished, which would result in a use-after-free. Fix by calling cancel_delayed_work_sync(), which ensures that the work is properly cancelled, no longer running, and unable to re-schedule itself. Reported-by: Hulk Robot Signed-off-by: Yang Yingliang Link: https://lore.kernel.org/r/20210407092716.3270248-1-yangyingliang@huawei.com Signed-off-by: Vinod Koul Signed-off-by: Greg Kroah-Hartman Signed-off-by: Sasha Levin

phy: ti: convert to devm_platform_ioremap_resource(_byname)

2020-11-16T07:17:48+00:00

Use devm_platform_ioremap_resource(_byname) to simplify code Signed-off-by: Chunfeng Yun Link: https://lore.kernel.org/r/1604642930-29019-17-git-send-email-chunfeng.yun@mediatek.com Signed-off-by: Vinod Koul

Merge 5.9-rc8 into usb-next

2020-10-05T06:54:36+00:00

We need the USB fixes in here as well for testing. Signed-off-by: Greg Kroah-Hartman

phy: ti: am654: Fix a leak in serdes_am654_probe()

2020-09-08T10:53:09+00:00

If devm_phy_create() fails then we need to call of_clk_del_provider(node) to undo the call to of_clk_add_provider(). Fixes: 71e2f5c5c224 ("phy: ti: Add a new SERDES driver for TI's AM654x SoC") Signed-off-by: Dan Carpenter Link: https://lore.kernel.org/r/20200905124648.GA183976@mwanda Signed-off-by: Vinod Koul

phy: ti: gmii-sel: retrieve ports number and base offset from dt

2020-09-08T10:23:10+00:00

On K3 AM654x/J721E platforms the Port MII mode selection register(s) have similar format and placed in the System Control Module (SCM) module sequentially as one register per port, but, depending SOC and CPSW instance, the base offset and number of ports can be different. Hence, add possibility to retrieve number of ports and base registers offset from DT and support for max possible number of ports supported by K3 SoCs like J721E. Signed-off-by: Grygorii Strashko Link: https://lore.kernel.org/r/20200828201943.29155-4-grygorii.strashko@ti.com Signed-off-by: Vinod Koul

phy: ti: gmii-sel: use features mask during init

2020-09-08T10:23:10+00:00

Use features mask during PHYs initialization to simplify code. Signed-off-by: Grygorii Strashko Link: https://lore.kernel.org/r/20200828201943.29155-3-grygorii.strashko@ti.com Signed-off-by: Vinod Koul

phy: ti: gmii-sel: move phy init in separate function

2020-09-08T10:23:10+00:00

Move phy initialization in separate function to improve code readability and simplify future changes. Signed-off-by: Grygorii Strashko Link: https://lore.kernel.org/r/20200828201943.29155-2-grygorii.strashko@ti.com Signed-off-by: Vinod Koul

phy: omap-usb2-phy: fix coding style issues

2020-08-31T09:01:31+00:00

Fix checkpatch warnings and sort the include files alphabetically. Signed-off-by: Roger Quadros Link: https://lore.kernel.org/r/20200824075127.14902-3-rogerq@ti.com Signed-off-by: Vinod Koul