kernel/linux.git/drivers/phy/tegra/xusb.h, branch v6.19.11

phy: tegra: xusb: Decouple CYA_TRK_CODE_UPDATE_ON_IDLE from trk_hw_mode

2025-06-15T14:16:01+00:00

The logic that drives the pad calibration values resides in the controller reset domain and so the calibration values are only being captured when the controller is out of reset. However, by clearing the CYA_TRK_CODE_UPDATE_ON_IDLE bit, the calibration values can be set while the controller is in reset. The CYA_TRK_CODE_UPDATE_ON_IDLE bit was previously cleared based on the trk_hw_mode flag, but this dependency is not necessary. Instead, introduce a new flag, trk_update_on_idle, to independently control this bit. Fixes: d8163a32ca95 ("phy: tegra: xusb: Add Tegra234 support") Cc: stable@vger.kernel.org Signed-off-by: Wayne Chang Reviewed-by: Jon Hunter Tested-by: Jon Hunter Link: https://lore.kernel.org/r/20250519090929.3132456-2-waynec@nvidia.com Signed-off-by: Vinod Koul

phy: tegra: xusb: Support sleepwalk for Tegra234

2023-03-20T12:44:59+00:00

Add new registers programming in sleepwalk sequence for Tegra234: MASTER_ENABLE_A/B/C/D in XUSB_AO_UTMIP_SLEEPWALK. Signed-off-by: Henry Lin Signed-off-by: Haotien Hsu Link: https://lore.kernel.org/r/20230309061708.4156383-1-haotienh@nvidia.com Signed-off-by: Vinod Koul

phy: tegra: xusb: Add Tegra234 support

2023-01-17T16:27:42+00:00

Add support for the XUSB pad controller found on Tegra234 SoCs. It is mostly similar to the same IP found on Tegra194, because most of the Tegra234 XUSB PADCTL registers definition and programming sequence are the same as Tegra194, Tegra234 XUSB PADCTL can share the same driver with Tegra186 and Tegra194 XUSB PADCTL. Introduce a new feature, USB2 HW tracking, for Tegra234. The feature is to enable HW periodical PAD tracking which measure and capture the electric parameters of USB2.0 PAD. Signed-off-by: Sing-Han Chen Co-developed-by: Wayne Chang Signed-off-by: Wayne Chang Signed-off-by: Jon Hunter Link: https://lore.kernel.org/r/20230111110450.24617-6-jonathanh@nvidia.com Signed-off-by: Greg Kroah-Hartman

phy: tegra: xusb: Remove usb3 supply

2022-11-07T04:50:25+00:00

Remove redundant codes for getting the vbus supply of usb3 ports because we get and control the vbus supply by the companion usb2 ports Signed-off-by: Wayne Chang Signed-off-by: Haotien Hsu Reviewed-by: Jon Hunter Link: https://lore.kernel.org/r/20221005084031.2154251-1-haotienh@nvidia.com Signed-off-by: Vinod Koul

phy: tegra: xusb: add utmi pad power on/down ops

2022-08-19T09:10:08+00:00

Add utmi_pad_power_on/down ops for each SOC instead of exporting tegra_phy_xusb_utmi_pad_power_on/down directly for Tegra186 chip. Signed-off-by: BH Hsieh Signed-off-by: Jim Lin Link: https://lore.kernel.org/r/20220816082353.13390-2-jilin@nvidia.com Signed-off-by: Greg Kroah-Hartman

phy: tegra: xusb: Add sleepwalk and suspend/resume

2021-06-03T12:49:34+00:00

This commit adds sleepwalk/wake and suspend/resume interfaces to Tegra XUSB PHY driver. Tegra XUSB host controller driver makes use of sleepwalk functions to enable/disable sleepwalk circuit which is in always-on partition and can respond to USB resume signals when controller is not powered. Sleepwalk can be enabled/disabled for any USB UPHY individually. - tegra_xusb_padctl_enable_phy_sleepwalk() - tegra_xusb_padctl_disable_phy_sleepwalk() Tegra XUSB host controller driver makes use of wake functions to enable/disable/query wake circuit which is in always-on partition can wake system up when USB resume happens. Wake circuit can be enabled/disabled for any USB PHY individually. - tegra_xusb_padctl_enable_phy_wake() - tegra_xusb_padctl_disable_phy_wake() - tegra_xusb_padctl_remote_wake_detected() This commit also adds two system suspend stubs that can be used to save and restore XUSB PADCTL context during system suspend and resume. - tegra_xusb_padctl_suspend_noirq() - tegra_xusb_padctl_resume_noirq() Signed-off-by: JC Kuo Acked-By: Vinod Koul Signed-off-by: Thierry Reding

phy: tegra: xusb: Add Tegra210 lane_iddq operation

2021-06-03T12:49:33+00:00

As per Tegra210 TRM, before changing lane assignments, driver should keep lanes in IDDQ and sleep state; after changing lane assignments, driver should bring lanes out of IDDQ. This commit implements the required operations. Signed-off-by: JC Kuo Acked-By: Vinod Koul Signed-off-by: Thierry Reding

phy: tegra: xusb: Rearrange UPHY init on Tegra210

2021-06-03T12:49:33+00:00

This commit is a preparation for enabling XUSB SC7 support. It rearranges Tegra210 XUSB PADCTL UPHY initialization sequence, for the following reasons: 1. PLLE hardware power sequencer has to be enabled only after both PEX UPHY PLL and SATA UPHY PLL are initialized. tegra210_uphy_init() -> tegra210_pex_uphy_enable() -> tegra210_sata_uphy_enable() -> tegra210_plle_hw_sequence_start() -> tegra210_aux_mux_lp0_clamp_disable() 2. At cold boot and SC7 exit, the following bits must be cleared after PEX/SATA lanes are out of IDDQ (IDDQ_DISABLE=1). a. XUSB_PADCTL_ELPG_PROGRAM1_AUX_MUX_LP0_CLAMP_EN, b. XUSB_PADCTL_ELPG_PROGRAM1_AUX_MUX_LP0_CLAMP_EN_EARLY c. XUSB_PADCTL_ELPG_PROGRAM1_AUX_MUX_LP0_VCORE_DOWN tegra210_pex_uphy_enable() and tegra210_sata_uphy_enable() are in charge of bringing lanes out of IDDQ, and then AUX_MUX_LP0_* bits will be cleared by tegra210_aux_mux_lp0_clamp_disable(). 3. Once UPHY PLL hardware power sequencer is enabled, do not assert reset to PEX/SATA PLLs, otherwise UPHY PLL operation will be broken. Signed-off-by: JC Kuo Acked-By: Vinod Koul Signed-off-by: Thierry Reding

phy: tegra: xusb: Move usb3 port init for Tegra210

2021-06-03T12:49:33+00:00

The programming sequence in tegra210_usb3_port_enable() is required for both cold boot and SC7 exit, and must be performed only after PEX/SATA UPHY is initialized. Therefore, this commit moves the programming sequence to tegra210_usb3_phy_power_on(). PCIE/SATA phy .power_on() stub will invoke tegra210_usb3_phy_power_on() if the lane is assigned for XUSB super-speed. Signed-off-by: JC Kuo Acked-By: Vinod Koul Signed-off-by: Thierry Reding

phy: tegra: Don't use device-managed API to allocate ports

2020-03-19T13:00:05+00:00

The device-managed allocation API doesn't work well with the life-cycle of device objects. Since ports have device objects allocated within, it can lead to situations where these devices need to stay around until after their parent pad controller has been unbound from its driver. The device-managed memory allocated for the port objects will, however, get freed when the pad controller unbinds from the driver. This can cause use-after-free errors down the road. Note that the device is deleted as part of the driver unbind operation, so there isn't much that can be done with it after that point, but the memory still needs to stay around to ensure none of the references are invalidated. One situation where this arises is when a VBUS supply is associated with a USB 2 or 3 port. When that supply is released using regulator_put() an SRCU call will queue the release of the device link connecting the port and the regulator after a grace period. This means that the regulator is going to keep on to the last reference of the port device even after the pad controller driver was unbound (which is when the memory backing the port device is freed). Fix this by allocating port objects using non-device-managed memory. Add release callbacks for these objects so that their memory gets freed when the last reference goes away. This decouples the port devices' lifetime from the "active" lifetime of the pad controller (i.e. the time during which the pad controller driver owns the device). Signed-off-by: Thierry Reding