kernel/linux.git/drivers/phy/renesas, branch v6.18.21

phy: renesas: rcar-gen3-usb2: Fix an error handling path in rcar_gen3_phy_usb2_probe()

2025-12-18T13:03:08+00:00

[ Upstream commit 662bb179d3381c7c069e44bb177396bcaee31cc8 ] If an error occurs after the reset_control_deassert(), reset_control_assert() must be called, as already done in the remove function. Use devm_add_action_or_reset() to add the missing call and simplify the .remove() function accordingly. While at it, drop struct rcar_gen3_chan::rstc as it is not used aymore. [claudiu.beznea: removed "struct reset_control *rstc = data;" from rcar_gen3_reset_assert(), dropped struct rcar_gen3_chan::rstc] Fixes: 4eae16375357 ("phy: renesas: rcar-gen3-usb2: Add support to initialize the bus") Signed-off-by: Christophe JAILLET Reviewed-by: Biju Das Reviewed-by: Geert Uytterhoeven Tested-by: Wolfram Sang Signed-off-by: Claudiu Beznea Link: https://patch.msgid.link/20251023135810.1688415-3-claudiu.beznea.uj@bp.renesas.com Signed-off-by: Vinod Koul Signed-off-by: Sasha Levin

phy: renesas: r8a779f0-ether-serdes: add new step added to latest datasheet

2025-09-10T15:23:30+00:00

R-Car S4-8 datasheet Rev.1.20 describes some additional register settings at the end of the initialization. Signed-off-by: Michael Dege Link: https://lore.kernel.org/r/20250703-renesas-serdes-update-v4-2-1db5629cac2b@renesas.com Signed-off-by: Vinod Koul

phy: renesas: r8a779f0-ether-serdes: add USXGMII mode

2025-09-10T15:23:30+00:00

The initial driver implementation was limited to SGMII and 1GBit/s. The new mode allows speeds up to 2.5GBit/s on R-Car S4-8 SOCs. Signed-off-by: Michael Dege Link: https://lore.kernel.org/r/20250703-renesas-serdes-update-v4-1-1db5629cac2b@renesas.com Signed-off-by: Vinod Koul

phy: renesas: rcar-gen3-usb2: Fix ID check logic with VBUS valid

2025-09-01T16:45:56+00:00

The existing ID detection logic returned false when both IDDIG and VBUSVALID were set, which caused incorrect role determination in some cases. The condition: !(device && !vbus_valid) did not properly reflect the intended relationship between IDDIG and VBUSVALID signals. Update the logic to: return vbus_valid ? device : !device; This ensures that when VBUS is valid, the role follows the IDDIG value, and when VBUS is not valid, the role is inverted, matching the expected OTG behavior. Fixes: b725741f1c21 ("phy: renesas: rcar-gen3-usb2: Add support for RZ/T2H SoC") Signed-off-by: Lad Prabhakar Link: https://lore.kernel.org/r/20250821155957.1088337-1-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Vinod Koul

phy: renesas: rcar-gen3-usb2: Remove redundant ternary operators

2025-09-01T12:43:54+00:00

Remove redundant ternary operators to clean up the code. Signed-off-by: Liao Yuanhong Reviewed-by: Wolfram Sang Link: https://lore.kernel.org/r/20250828122401.17441-3-liaoyuanhong@vivo.com Signed-off-by: Vinod Koul

phy: renesas: rcar-gen3-usb2: Move debug print after register value is updated

2025-08-20T16:51:52+00:00

Relocate the debug print in rcar_gen3_enable_vbus_ctrl() to appear after the `val` variable is assigned and updated based on the VBUS state. This ensures that the debug log reflects the actual register value being written, improving debugging accuracy. Signed-off-by: Lad Prabhakar Reviewed-by: Neil Armstrong Link: https://lore.kernel.org/r/20250808215209.3692744-6-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Vinod Koul

phy: renesas: rcar-gen3-usb2: Add support for RZ/T2H SoC

2025-08-20T16:51:52+00:00

Add initial support for the Renesas RZ/T2H SoC to the R-Car Gen3 USB2 PHY driver. The RZ/T2H SoC requires configuration of additional hardware-specific bits for proper VBUS level control and OTG operation. Introduce the `vblvl_ctrl` flag in the SoC-specific driver data to enable handling of VBUS level selection logic using `VBCTRL.VBLVL` bits. This is required for managing the VBUS status detection and drive logic based on SoC-specific needs. Signed-off-by: Lad Prabhakar Reviewed-by: Neil Armstrong Link: https://lore.kernel.org/r/20250808215209.3692744-5-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Vinod Koul

phy: renesas: rcar-gen3-usb2: Allow SoC-specific OBINT bits via phy_data

2025-08-20T16:51:51+00:00

Update the PHY driver to support SoC-specific OBINT enable bits by introducing the `obint_enable_bits` field in the `rcar_gen3_phy_drv_data` structure. This allows each SoC to specify bits required. Signed-off-by: Lad Prabhakar Reviewed-by: Neil Armstrong Link: https://lore.kernel.org/r/20250808215209.3692744-4-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Vinod Koul

phy: renesas: rcar-gen3-usb2: store drvdata pointer in channel

2025-08-20T16:51:51+00:00

Store the SoC-specific driver data pointer (struct rcar_gen3_phy_drv_data) directly in struct rcar_gen3_chan instead of copying individual flags into separate channel members. Obtain the drvdata with of_device_get_match_data() in probe and assign it to channel->phy_data. Update all call sites to reference `channel->phy_data->*` for SoC-specific behaviour (for example no_adp_ctrl and utmi_ctrl). Remove the redundant soc_no_adp_ctrl and utmi_ctrl fields from struct rcar_gen3_chan. This simplifies the probe path, reduces duplication, and makes it easier to extend the driver with additional platform-specific fields in the future. Signed-off-by: Lad Prabhakar Link: https://lore.kernel.org/r/20250808215209.3692744-3-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Vinod Koul

Merge tag 'phy-for-6.16' of git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy

2025-06-05T15:20:21+00:00

Pull phy updates from Vinod Koul: "As usual featuring couple of new driver and bunch of new device support and some driver changes to Freescale, rockchip driver along with couple of yaml binding conversions. New Support: - Qualcomm IPQ5424 qusb2 support, IPQ5018 uniphy-pcie driver - Rockchip usb2 support for RK3562, RK3036 usb2 phy support - Samsung exynos2200 eusb2 phy support and driver refactoring for this support, exynos7870 USBDRD support - Mediatek MT7988 xs-phy support - Broadcom BCM74110 usb phy support - Renesas RZ/V2H(P) usb2 phy support Updates: - Freescale phy rate claculation updates, i.MX95 tuning support - Better error handling for amlogic pcie phy - Rockchip color depth configuration and management support - Yaml binding conversion for RK3399 Type-C and PCIe Phy" * tag 'phy-for-6.16' of git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy: (77 commits) phy: tegra: p2u: Broaden architecture dependency phy: rockchip: inno-usb2: Add usb2 phy support for rk3562 dt-bindings: phy: rockchip,inno-usb2phy: add rk3562 phy: rockchip: inno-usb2: add phy definition for rk3036 dt-bindings: phy: rockchip,inno-usb2phy: add rk3036 compatible phy: freescale: fsl-samsung-hdmi: Improve LUT search for best clock phy: freescale: fsl-samsung-hdmi: Refactor finding PHY settings phy: freescale: fsl-samsung-hdmi: Rename phy_clk_round_rate phy: renesas: phy-rcar-gen3-usb2: Add USB2.0 PHY support for RZ/V2H(P) phy: renesas: phy-rcar-gen3-usb2: Sort compatible entries by SoC part number dt-bindings: phy: renesas,usb2-phy: Document RZ/V2H(P) SoC dt-bindings: phy: renesas,usb2-phy: Add clock constraint for RZ/G2L family phy: exynos5-usbdrd: support Exynos USBDRD 3.2 4nm controller phy: phy-snps-eusb2: add support for exynos2200 phy: phy-snps-eusb2: refactor reference clock init phy: phy-snps-eusb2: make reset control optional phy: phy-snps-eusb2: make repeater optional phy: phy-snps-eusb2: split phy init code phy: phy-snps-eusb2: refactor constructs names phy: move phy-qcom-snps-eusb2 out of its vendor sub-directory ...