kernel/linux.git/drivers/phy/ralink, branch v6.6.132

phy: Use device_get_match_data()

2025-09-25T09:00:10+00:00

[ Upstream commit 21bf6fc47a1e45031ba8a7084343b7cfd09ed1d3 ] Use preferred device_get_match_data() instead of of_match_device() to get the driver match data. With this, adjust the includes to explicitly include the correct headers. Signed-off-by: Rob Herring Reviewed-by: Heiko Stuebner Link: https://lore.kernel.org/r/20231009172923.2457844-15-robh@kernel.org Signed-off-by: Vinod Koul Stable-dep-of: 64961557efa1 ("phy: ti: omap-usb2: fix device leak at unbind") Signed-off-by: Sasha Levin Signed-off-by: Greg Kroah-Hartman

phy: Explicitly include correct DT includes

2023-07-17T06:22:56+00:00

The DT of_device.h and of_platform.h date back to the separate of_platform_bus_type before it as merged into the regular platform bus. As part of that merge prepping Arm DT support 13 years ago, they "temporarily" include each other. They also include platform_device.h and of.h. As a result, there's a pretty much random mix of those include files used throughout the tree. In order to detangle these headers and replace the implicit includes with struct declarations, users need to explicitly include the correct includes. Signed-off-by: Rob Herring Acked-by: Marc Kleine-Budde # for drivers/phy/phy-can-transceiver.c Acked-by: Heiko Stuebner Acked-by: Sergio Paracuellos Link: https://lore.kernel.org/r/20230714174841.4061919-1-robh@kernel.org Signed-off-by: Vinod Koul

phy: ralink: mt7621-pci: add sentinel to quirks table

2022-11-05T07:31:25+00:00

With mt7621 soc_dev_attr fixed to register the soc as a device, kernel will experience an oops in soc_device_match_attr This quirk test was introduced in the staging driver in commit 9445ccb3714c ("staging: mt7621-pci-phy: add quirks for 'E2' revision using 'soc_device_attribute'"). The staging driver was removed, and later re-added in commit d87da32372a0 ("phy: ralink: Add PHY driver for MT7621 PCIe PHY") for kernel 5.11 Link: https://lore.kernel.org/lkml/26ebbed1-0fe9-4af9-8466-65f841d0b382@app.fastmail.com Fixes: d87da32372a0 ("phy: ralink: Add PHY driver for MT7621 PCIe PHY") Signed-off-by: John Thomson Acked-by: Sergio Paracuellos Link: https://lore.kernel.org/r/20221104205242.3440388-2-git@johnthomson.fastmail.com.au Signed-off-by: Vinod Koul

Merge tag 'phy-for-5.14_v2' of git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy into char-misc-next

2021-06-23T08:33:34+00:00

Vinod writes: phy-for-5.14 version 2 - Updates: - Yaml conversion for renesas,rcar-gen3 pcie phy and rockchip-usb-phy bindings - Support for devm_phy_get() taking NULL phy name - New support: - PCIe phy for Qualcomm IPQ60xx - PCIe phy for Qualcomm SDX55 - USB phy for RK3308 - CAN transceivers phy for TI TCAN104x - Innosilicon-based CSI dphy for rockchip * tag 'phy-for-5.14_v2' of git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy: (36 commits) phy: Revert "phy: ralink: Kconfig: convert mt7621-pci-phy into 'bool'" phy: ti: dm816x: Fix the error handling path in 'dm816x_usb_phy_probe() phy: uniphier-pcie: Fix updating phy parameters phy/rockchip: add Innosilicon-based CSI dphy dt-bindings: phy: add yaml binding for rockchip-inno-csi-dphy phy: rockchip: remove redundant initialization of pointer cfg phy: phy-can-transceiver: Add support for generic CAN transceiver driver dt-bindings: phy: Add binding for TI TCAN104x CAN transceivers phy: core: Reword the comment specifying the units of max_link_rate to be Mbps phy: phy-mtk-hdmi: Remove redundant dev_err call in mtk_hdmi_phy_probe() phy: phy-mtk-mipi-dsi: Remove redundant dev_err call in mtk_mipi_tx_probe() phy: phy-mmp3-hsic: Remove redundant dev_err call in mmp3_hsic_phy_probe() phy: bcm-ns-usb3: Remove redundant dev_err call in bcm_ns_usb3_mdio_probe() MAINTAINERS: update marvell,armada-3700-utmi-phy.yaml reference phy: phy-twl4030-usb: use DEVICE_ATTR_RO macro dt-bindings: phy: convert rockchip-usb-phy.txt to YAML phy: phy-rockchip-inno-usb2: add support for RK3308 USB phy dt-bindings: phy: rockchip-inno-usb2: add compatible for rk3308 USB phy phy: stm32: manage optional vbus regulator on phy_power_on/off dt-bindings: phy: add vbus-supply optional property to phy-stm32-usbphyc ...

phy: Revert "phy: ralink: Kconfig: convert mt7621-pci-phy into 'bool'"

2021-06-23T07:29:46+00:00

This reverts commit 6eded551cefe ("phy: ralink: Kconfig: convert mt7621-pci-phy into 'bool'") as we don't want drivers to be built in and should be a module instead Signed-off-by: Vinod Koul

phy: ralink: phy-mt7621-pci: drop 'of_match_ptr' to fix -Wunused-const-variable

2021-06-03T05:48:14+00:00

The of_device_id is included unconditionally by of.h header and used in the driver as well. Remove of_match_ptr to fix W=1 compile test warning with !CONFIG_OF: drivers/phy/ralink/phy-mt7621-pci.c:341:34: warning: unused variable 'mt7621_pci_phy_ids' [-Wunused-const-variable] Reported-by: kernel test robot Signed-off-by: Sergio Paracuellos Link: https://lore.kernel.org/r/20210603043219.32646-1-sergio.paracuellos@gmail.com Signed-off-by: Vinod Koul

phy: ralink: phy-mt7621-pci: properly print pointer address

2021-05-14T10:46:29+00:00

The way of printing the pointer address for the 'port_base' address got into compile warnings on some architectures [-Wpointer-to-int-cast]. Instead of use '%08x' and cast to an 'unsigned int' just make use of '%px' and avoid the cast. To avoid not really needed driver verbosity on normal behaviour change also from 'dev_info' to 'dev_dbg'. Fixes: d87da32372a0 ("phy: ralink: Add PHY driver for MT7621 PCIe PHY") Reported-by: kernel test robot Signed-off-by: Sergio Paracuellos Link: https://lore.kernel.org/r/20210508070930.5290-7-sergio.paracuellos@gmail.com Signed-off-by: Vinod Koul

phy: ralink: Kconfig: convert mt7621-pci-phy into 'bool'

2021-05-14T10:46:29+00:00

Make dependent on PCI_MT7621 configuration option and mark this pci phy configuration as bool which has more sense. Signed-off-by: Sergio Paracuellos Link: https://lore.kernel.org/r/20210508070930.5290-6-sergio.paracuellos@gmail.com Signed-off-by: Vinod Koul

phy: ralink: Kconfig: enable COMPILE_TEST on mt7621-pci-phy driver

2021-05-14T10:46:29+00:00

After use the clock apis and avoid custom architecture code this driver can properly be enabled for COMPILE_TEST. Signed-off-by: Sergio Paracuellos Link: https://lore.kernel.org/r/20210508070930.5290-5-sergio.paracuellos@gmail.com Signed-off-by: Vinod Koul

phy: ralink: phy-mt7621-pci: use kernel clock APIS

2021-05-14T10:46:28+00:00

MT7621 SoC clock driver has already mainlined in 'commit 48df7a26f470 ("clk: ralink: add clock driver for mt7621 SoC")' This allow us to properly use kernel clock apis to get the clock frequency needed for the phy configuration instead of use custom architecture code to do the same. Signed-off-by: Sergio Paracuellos Link: https://lore.kernel.org/r/20210508070930.5290-4-sergio.paracuellos@gmail.com Signed-off-by: Vinod Koul