kernel/linux.git/drivers/phy/marvell, branch v6.19.11

phy: mvebu-cp110-utmi: fix dr_mode property read from dts

2026-03-04T12:20:42+00:00

[ Upstream commit e2ce913452ab56b3330539cc443b97b7ea8c3a1a ] The problem with the current implementation is that it does not consider that the USB controller can have multiple PHY handles with different arguments count, as for example we have in our cn9131 based platform: "phys = <&cp0_comphy1 0>, <&cp0_utmi0>;". In such case calling "of_usb_get_dr_mode_by_phy" with -1 (no phy-cells) leads to not proper phy detection, taking the "marvell,cp110-utmi-phy" dts definition we can call the "of_usb_get_dr_mode_by_phy" with 0 (#phy-cells = <0>) and safely look for that phy. Signed-off-by: Aleksandar Gerasimovski Link: https://patch.msgid.link/20260106150643.922110-1-aleksandar.gerasimovski@belden.com Signed-off-by: Vinod Koul Signed-off-by: Sasha Levin

phy: drop probe registration printks

2025-06-16T17:24:21+00:00

Drivers should generally be quiet on successful probe, but this is not followed by some PHY drivers, for example: snps-eusb2-hsphy 88e1000.phy: Registered Snps-eUSB2 phy qcom-eusb2-repeater c432000.spmi:pmic@7:phy@fd00: Registered Qcom-eUSB2 repeater qcom-eusb2-repeater c432000.spmi:pmic@a:phy@fd00: Registered Qcom-eUSB2 repeater qcom-eusb2-repeater c432000.spmi:pmic@b:phy@fd00: Registered Qcom-eUSB2 repeater snps-eusb2-hsphy fd3000.phy: Registered Snps-eUSB2 phy snps-eusb2-hsphy fd9000.phy: Registered Snps-eUSB2 phy snps-eusb2-hsphy fde000.phy: Registered Snps-eUSB2 phy snps-eusb2-hsphy 88e0000.phy: Registered Snps-eUSB2 phy snps-eusb2-hsphy 88e2000.phy: Registered Snps-eUSB2 phy Drop (or demote to debug level) unnecessary registration info messages to make boot logs a little less noisy. Signed-off-by: Johan Hovold Link: https://lore.kernel.org/r/20250523085112.11287-1-johan+linaro@kernel.org Signed-off-by: Vinod Koul

phy: marvell: Do not enable by default during compile testing

2025-04-11T07:18:34+00:00

Enabling the compile test should not cause automatic enabling of all drivers. Signed-off-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20250404121326.318936-1-krzysztof.kozlowski@linaro.org Signed-off-by: Vinod Koul

phy: marvell: Fix spelling mistake "exlicitly" -> "explicitly"

2024-12-04T14:11:59+00:00

Fix spelling mistake in mvebu_comphy_ethernet_init_reset comments. Signed-off-by: Advait Dhamorikar Link: https://lore.kernel.org/r/20241127104333.18944-1-advaitdhamorikar@gmail.com Signed-off-by: Vinod Koul

phy: mvebu-cp110-utmi: support swapping d+/d- lanes by dts property

2024-10-07T06:30:19+00:00

CP11x UTMI PHY supports swapping D+/D- signals via digital control register 1. Add support for the "swap-dx-lanes" device-tree property, which lists the port-ids that should swap D+ and D-. The property is evaluated in probe and applied before power-on during mvebu_cp110_utmi_port_setup. Signed-off-by: Josua Mayer Link: https://lore.kernel.org/r/20241002-mvebu-utmi-phy-v4-1-83783dc89b9d@solid-run.com Signed-off-by: Vinod Koul

phy: marvell: phy-mvebu-cp110-comphy: improve eth_port1 on comphy4

2024-08-04T17:22:11+00:00

According to the CN9100_MPP_information document, CP_SRD4 (comphy 4) supports 2500 BASE-X and 5000 BASE-R for ETH_PORT1. I was able to test that 2500 BASE-X is indeed supported. Unfortunately, our HW does not support 5000 BASE-R, but I assume from the document that it does, so I set the muxing there too to 0x1. Signed-off-by: Stefan Eichenberger Link: https://lore.kernel.org/r/20240711131612.98952-1-eichest@gmail.com Signed-off-by: Vinod Koul

phy: marvell: a3700-comphy: Fix hardcoded array size

2024-04-05T17:02:00+00:00

Replace hardcoded 'gbe_phy_init' array size by explicit one. Fixes: 934337080c6c ("phy: marvell: phy-mvebu-a3700-comphy: Add native kernel implementation") Signed-off-by: Mikhail Kobuk Link: https://lore.kernel.org/r/20240321164734.49273-2-m.kobuk@ispras.ru Signed-off-by: Vinod Koul

phy: marvell: a3700-comphy: Fix out of bounds read

2024-04-05T17:02:00+00:00

There is an out of bounds read access of 'gbe_phy_init_fix[fix_idx].addr' every iteration after 'fix_idx' reaches 'ARRAY_SIZE(gbe_phy_init_fix)'. Make sure 'gbe_phy_init[addr]' is used when all elements of 'gbe_phy_init_fix' array are handled. Found by Linux Verification Center (linuxtesting.org) with SVACE. Fixes: 934337080c6c ("phy: marvell: phy-mvebu-a3700-comphy: Add native kernel implementation") Signed-off-by: Mikhail Kobuk Reviewed-by: Miquel Raynal Link: https://lore.kernel.org/r/20240321164734.49273-1-m.kobuk@ispras.ru Signed-off-by: Vinod Koul

phy: constify of_phandle_args in xlate

2024-02-23T12:13:14+00:00

The xlate callbacks are supposed to translate of_phandle_args to proper provider without modifying the of_phandle_args. Make the argument pointer to const for code safety and readability. Signed-off-by: Krzysztof Kozlowski Acked-by: Thierry Reding Acked-by: Linus Walleij Acked-by: Florian Fainelli #Broadcom Link: https://lore.kernel.org/r/20240217093937.58234-1-krzysztof.kozlowski@linaro.org Signed-off-by: Vinod Koul

phy: armada-38x: add mux value for gbe port 0 on serdes 0

2024-01-24T05:53:12+00:00

Armada 38x supports 3 functions on serdes #0: - pcie port 0 - sata port 0 - gbe port 0 Add missing entry for gbe port 0 on serdes 0 to the gbe_mux array. Because this array looks obscure to new readers, also add a comment explaining the meaning of rows, columns and values. Signed-off-by: Josua Mayer Link: https://lore.kernel.org/r/20240106-fix-a38x-comphy-sd0-gbe0-v1-1-c7fd87272050@solid-run.com Signed-off-by: Vinod Koul