<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/linux.git/drivers/phy/marvell, branch v5.4.50</title>
<subtitle>Linux kernel stable tree (mirror)</subtitle>
<id>https://git.radix-linux.su/kernel/linux.git/atom?h=v5.4.50</id>
<link rel='self' href='https://git.radix-linux.su/kernel/linux.git/atom?h=v5.4.50'/>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/'/>
<updated>2019-08-27T06:07:09+00:00</updated>
<entry>
<title>phy: marvell: phy-mvebu-cp110-comphy: rename instances of DLT</title>
<updated>2019-08-27T06:07:09+00:00</updated>
<author>
<name>Matt Pelland</name>
<email>mpelland@starry.com</email>
</author>
<published>2019-08-01T19:50:59+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=5af67635c36ed92ef172c7bbf4d711364bc3bdf7'/>
<id>urn:sha1:5af67635c36ed92ef172c7bbf4d711364bc3bdf7</id>
<content type='text'>
The documentation for Marvell's cp110 phy refers to these
registers/register regions as DTL control, DTL frequency loop enable,
etc. This patch aligns the relevant code for these accordingly.

Signed-off-by: Matt Pelland &lt;mpelland@starry.com&gt;
Signed-off-by: Kishon Vijay Abraham I &lt;kishon@ti.com&gt;
</content>
</entry>
<entry>
<title>phy: marvell: phy-mvebu-cp110-comphy: implement RXAUI support</title>
<updated>2019-08-27T06:07:09+00:00</updated>
<author>
<name>Matt Pelland</name>
<email>mpelland@starry.com</email>
</author>
<published>2019-08-01T19:50:58+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=f2a857aa2ad7335a54bd7b306ce02488eb269d58'/>
<id>urn:sha1:f2a857aa2ad7335a54bd7b306ce02488eb269d58</id>
<content type='text'>
Marvell's cp110 phy supports RXAUI on lanes 2, 3, 4, and 5 when
connected to port zero. When used in this mode, lanes operate in pairs
of two (2 and 3, 4 and 5).

Signed-off-by: Matt Pelland &lt;mpelland@starry.com&gt;
Signed-off-by: Kishon Vijay Abraham I &lt;kishon@ti.com&gt;
</content>
</entry>
<entry>
<title>phy: mvebu-cp110-comphy: Update comment about powering off all lanes at boot</title>
<updated>2019-08-27T06:07:09+00:00</updated>
<author>
<name>Miquel Raynal</name>
<email>miquel.raynal@bootlin.com</email>
</author>
<published>2019-07-31T12:21:19+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=4e19a76ec08e52dd3ad43dcd49bbb704a2ff420b'/>
<id>urn:sha1:4e19a76ec08e52dd3ad43dcd49bbb704a2ff420b</id>
<content type='text'>
Now that all COMPHY modes are supported by the driver, update the
comment stating that mvebu_comphy_power_off() should be called for
each lane. This is still wrong because for compatibility reasons, it
might break users running an old firmware (the driver only uses SMC
calls for SATA, USB and PCIe configuration, there is no code in Linux
to fallback on in these cases.

Signed-off-by: Miquel Raynal &lt;miquel.raynal@bootlin.com&gt;
Signed-off-by: Kishon Vijay Abraham I &lt;kishon@ti.com&gt;
</content>
</entry>
<entry>
<title>phy: mvebu-cp110-comphy: Add PCIe support</title>
<updated>2019-08-27T06:07:09+00:00</updated>
<author>
<name>Grzegorz Jaszczyk</name>
<email>jaz@semihalf.com</email>
</author>
<published>2019-07-31T12:21:18+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=652488760ea613af0c1207169aeafc9c91203c38'/>
<id>urn:sha1:652488760ea613af0c1207169aeafc9c91203c38</id>
<content type='text'>
Add PCIe support by filling the COMPHY modes table.

Also add a new macro to generate the right value for the firmware
depending on the width (PCI x1, x2, x4, etc). The width will be passed
by the core as the "submode" argument of the -&gt;set_mode() callback. If
this argument is zero, default to x1 mode.

Signed-off-by: Grzegorz Jaszczyk &lt;jaz@semihalf.com&gt;
[miquel.raynal@bootlin.com: adapt the content to the mainline driver]
Signed-off-by: Miquel Raynal &lt;miquel.raynal@bootlin.com&gt;
Signed-off-by: Kishon Vijay Abraham I &lt;kishon@ti.com&gt;
</content>
</entry>
<entry>
<title>phy: mvebu-cp110-comphy: Cosmetic change in a helper</title>
<updated>2019-08-27T06:07:09+00:00</updated>
<author>
<name>Miquel Raynal</name>
<email>miquel.raynal@bootlin.com</email>
</author>
<published>2019-07-31T12:21:17+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=1eb9157ab3ef64e845e10fe40d49638fb408119e'/>
<id>urn:sha1:1eb9157ab3ef64e845e10fe40d49638fb408119e</id>
<content type='text'>
Before adding more logic, simplify a bit the writing of the
mvebu_comphy_get_mode() helper by using a pointer instead of
referencing a configuration with the entire table name.

Signed-off-by: Miquel Raynal &lt;miquel.raynal@bootlin.com&gt;
Signed-off-by: Kishon Vijay Abraham I &lt;kishon@ti.com&gt;
</content>
</entry>
<entry>
<title>phy: mvebu-cp110-comphy: Add SATA support</title>
<updated>2019-08-27T06:07:09+00:00</updated>
<author>
<name>Grzegorz Jaszczyk</name>
<email>jaz@semihalf.com</email>
</author>
<published>2019-07-31T12:21:16+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=ef0ac9f24b65bac389a21b2d37ab90200f285062'/>
<id>urn:sha1:ef0ac9f24b65bac389a21b2d37ab90200f285062</id>
<content type='text'>
Add the corresponding entries in the COMPHY modes table.

SATA support does not need any additional care.

Signed-off-by: Grzegorz Jaszczyk &lt;jaz@semihalf.com&gt;
[miquel.raynal@bootlin.com: adapt the content to the mainline driver]
Signed-off-by: Miquel Raynal &lt;miquel.raynal@bootlin.com&gt;
Signed-off-by: Kishon Vijay Abraham I &lt;kishon@ti.com&gt;
</content>
</entry>
<entry>
<title>phy: mvebu-cp110-comphy: Add USB3 host/device support</title>
<updated>2019-08-27T06:07:09+00:00</updated>
<author>
<name>Grzegorz Jaszczyk</name>
<email>jaz@semihalf.com</email>
</author>
<published>2019-07-31T12:21:15+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=c527a636d6200b0583caa7dee2427b0de218fb2c'/>
<id>urn:sha1:c527a636d6200b0583caa7dee2427b0de218fb2c</id>
<content type='text'>
Add USB3 host/device support by adding the right entries in the COMPHY
modes table. A new macro is created to instantiate a "generic" mode
ie. not an Ethernet one. This macro will be re-used when adding SATA
support.

Signed-off-by: Grzegorz Jaszczyk &lt;jaz@semihalf.com&gt;
[miquel.raynal@bootlin.com: adapt the content to the mainline driver]
Signed-off-by: Miquel Raynal &lt;miquel.raynal@bootlin.com&gt;
Signed-off-by: Kishon Vijay Abraham I &lt;kishon@ti.com&gt;
</content>
</entry>
<entry>
<title>phy: mvebu-cp110-comphy: Allow non-Ethernet modes to be configured</title>
<updated>2019-08-27T06:07:09+00:00</updated>
<author>
<name>Miquel Raynal</name>
<email>miquel.raynal@bootlin.com</email>
</author>
<published>2019-07-31T12:21:14+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=96888aed3d09862c1d80b3ccb405b4bcf6d827c5'/>
<id>urn:sha1:96888aed3d09862c1d80b3ccb405b4bcf6d827c5</id>
<content type='text'>
The COMPHY can configure the SERDES lanes in several non-Ethernet
modes: SATA, USB3, PCIe. Drop the condition limiting the driver to
Ethernet modes only before adding support for more.

Signed-off-by: Miquel Raynal &lt;miquel.raynal@bootlin.com&gt;
Signed-off-by: Kishon Vijay Abraham I &lt;kishon@ti.com&gt;
</content>
</entry>
<entry>
<title>phy: mvebu-cp110-comphy: Rename the macro handling only Ethernet modes</title>
<updated>2019-08-27T06:07:09+00:00</updated>
<author>
<name>Miquel Raynal</name>
<email>miquel.raynal@bootlin.com</email>
</author>
<published>2019-07-31T12:21:13+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=c2afb2fef595805607633b6bffd5600d836e4ead'/>
<id>urn:sha1:c2afb2fef595805607633b6bffd5600d836e4ead</id>
<content type='text'>
Before adding support for other PHY modes (not Ethernet ones), let's
rename the MVEBU_COMPHY_CONF macro to a more specific (and shorter)
appellation.

Signed-off-by: Miquel Raynal &lt;miquel.raynal@bootlin.com&gt;
Signed-off-by: Kishon Vijay Abraham I &lt;kishon@ti.com&gt;
</content>
</entry>
<entry>
<title>phy: mvebu-cp110-comphy: Add RXAUI support</title>
<updated>2019-08-27T06:07:09+00:00</updated>
<author>
<name>Grzegorz Jaszczyk</name>
<email>jaz@semihalf.com</email>
</author>
<published>2019-07-31T12:21:12+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=461324f0382cf63637d7158da53a5419ba51be54'/>
<id>urn:sha1:461324f0382cf63637d7158da53a5419ba51be54</id>
<content type='text'>
Add support for RXAUI mode by adding an entry in the COMPHY modes list.

There is no user for this mode yet so we can enforce an up-to-date
firmware and return an error otherwise without breaking anywone.

Signed-off-by: Grzegorz Jaszczyk &lt;jaz@semihalf.com&gt;
[miquel.raynal@bootlin.com: adapt the content to the mainline driver]
Signed-off-by: Miquel Raynal &lt;miquel.raynal@bootlin.com&gt;
Signed-off-by: Kishon Vijay Abraham I &lt;kishon@ti.com&gt;
</content>
</entry>
</feed>
