kernel/linux.git/drivers/phy/allwinner, branch v6.1.168

phy: sun4i-usb: Add support for the H616 USB PHY

2023-01-04T10:28:56+00:00

[ Upstream commit 0f607406525d25019dd9c498bcc0b42734fc59d5 ] The USB PHY used in the Allwinner H616 SoC inherits some traits from its various predecessors: it has four full PHYs like the H3, needs some extra bits to be set like the H6, and puts SIDDQ on a different bit like the A100. Plus it needs this weird PHY2 quirk. Name all those properties in a new config struct and assign a new compatible name to it. Signed-off-by: Andre Przywara Reviewed-by: Samuel Holland Link: https://lore.kernel.org/r/20221031111358.3387297-5-andre.przywara@arm.com Signed-off-by: Vinod Koul Signed-off-by: Sasha Levin

phy: sun4i-usb: Introduce port2 SIDDQ quirk

2023-01-04T10:28:56+00:00

[ Upstream commit b45c6d80325bec2b78c716629a518b6442d8bdc6 ] At least the Allwinner H616 SoC requires a weird quirk to make most USB PHYs work: Only port2 works out of the box, but all other ports need some help from this port2 to work correctly: The CLK_BUS_PHY2 and RST_USB_PHY2 clock and reset need to be enabled, and the SIDDQ bit in the PMU PHY control register needs to be cleared. For this register to be accessible, CLK_BUS_ECHI2 needs to be ungated. Don't ask .... Instead of disguising this as some generic feature, treat it more like a quirk (what it really is): If the quirk bit is set, and we initialise a PHY other than PHY2, ungate this one special clock, and clear the SIDDQ bit. We also pick the clock and reset from PHY2 and enable them as well. Signed-off-by: Andre Przywara Link: https://lore.kernel.org/r/20221031111358.3387297-4-andre.przywara@arm.com Signed-off-by: Vinod Koul Signed-off-by: Sasha Levin

phy: move from strlcpy with unused retval to strscpy

2022-08-30T07:42:38+00:00

Follow the advice of the below link and prefer 'strscpy' in this subsystem. Conversion is 1:1 because the return value is not used. Generated by a coccinelle script. Link: https://lore.kernel.org/r/CAHk-=wgfRnXz0W3D37d01q3JFkr_i_uTL=V6A6G1oUZcprmknw@mail.gmail.com/ Signed-off-by: Wolfram Sang Acked-by: Jernej Skrabec Link: https://lore.kernel.org/r/20220818210056.7205-1-wsa+renesas@sang-engineering.com Signed-off-by: Vinod Koul

phy: allwinner: phy-sun6i-mipi-dphy: Support D-PHY Rx mode for MIPI CSI-2

2022-04-20T09:10:12+00:00

The Allwinner A31 D-PHY supports both Rx and Tx modes. While the latter is already supported and used for MIPI DSI this adds support for the former, to be used with MIPI CSI-2. This implementation is inspired by Allwinner's V3s Linux SDK implementation, which was used as a documentation base. It uses the direction dt property to distinguish between tx and rx directions. Signed-off-by: Paul Kocialkowski Link: https://lore.kernel.org/r/20220415152138.635525-3-paul.kocialkowski@bootlin.com Signed-off-by: Vinod Koul

phy: sun4i-usb: Add D1 variant

2022-02-25T08:23:21+00:00

D1 has a register layout like A100 and H616, with the moved SIDDQ bit. Unlike H616 it does not have any dependencies between PHY instances. Signed-off-by: Samuel Holland Link: https://lore.kernel.org/r/20220203013558.11490-4-samuel@sholland.org Signed-off-by: Vinod Koul

phy: sun4i-usb: Rework HCI PHY (aka "pmu_unk1") handling

2022-02-25T08:23:21+00:00

As Icenowy pointed out, newer manuals (starting with H6) actually document the register block at offset 0x800 as "HCI controller and PHY interface", also describe the bits in our "PMU_UNK1" register. Let's put proper names to those "unknown" variables and symbols. While we are at it, generalise the existing code by allowing a bitmap of bits to clear and set, to cover newer SoCs: The A100 and H616 use a different bit for the SIDDQ control. Signed-off-by: Andre Przywara Signed-off-by: Samuel Holland Link: https://lore.kernel.org/r/20220203013558.11490-3-samuel@sholland.org Signed-off-by: Vinod Koul

phy: sun4i-usb: Remove .disc_thresh where not applicable

2022-02-25T08:23:21+00:00

.disc_thresh is not used when .type = sun50i_h6_phy, so providing a value for it is misleading. Signed-off-by: Samuel Holland Link: https://lore.kernel.org/r/20220203013558.11490-2-samuel@sholland.org Signed-off-by: Vinod Koul

phy: sun4i-usb: remove enable_pmu_unk1 from sun50i_h6_cfg

2020-11-19T06:19:18+00:00

For the current code, enable_pmu_unk1 only works in non-a83t and non-h6 types. So let's delete it from the sun50i_h6_cfg. Signed-off-by: Yangtao Li Link: https://lore.kernel.org/r/dc8cbb7b3cd59902a6719f207d18a232903fac8a.1604988979.git.frank@allwinnertech.com Signed-off-by: Vinod Koul

phy: allwinner: convert to devm_platform_ioremap_resource(_byname)

2020-11-16T07:17:46+00:00

Use devm_platform_ioremap_resource(_byname) to simplify code Signed-off-by: Chunfeng Yun Link: https://lore.kernel.org/r/1604642930-29019-1-git-send-email-chunfeng.yun@mediatek.com Signed-off-by: Vinod Koul

Merge branch 'fixes' into next

2020-07-17T08:15:53+00:00