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<title>kernel/linux.git/drivers/pci/Makefile, branch v6.6.132</title>
<subtitle>Linux kernel stable tree (mirror)</subtitle>
<id>https://git.radix-linux.su/kernel/linux.git/atom?h=v6.6.132</id>
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<updated>2023-08-22T19:56:09+00:00</updated>
<entry>
<title>PCI: Create device tree node for bridge</title>
<updated>2023-08-22T19:56:09+00:00</updated>
<author>
<name>Lizhi Hou</name>
<email>lizhi.hou@amd.com</email>
</author>
<published>2023-08-15T17:19:57+00:00</published>
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<id>urn:sha1:407d1a51921e9f28c1bcec647c2205925bd1fdab</id>
<content type='text'>
The PCI endpoint device such as Xilinx Alveo PCI card maps the register
spaces from multiple hardware peripherals to its PCI BAR. Normally,
the PCI core discovers devices and BARs using the PCI enumeration process.
There is no infrastructure to discover the hardware peripherals that are
present in a PCI device, and which can be accessed through the PCI BARs.

Apparently, the device tree framework requires a device tree node for the
PCI device. Thus, it can generate the device tree nodes for hardware
peripherals underneath. Because PCI is self discoverable bus, there might
not be a device tree node created for PCI devices. Furthermore, if the PCI
device is hot pluggable, when it is plugged in, the device tree nodes for
its parent bridges are required. Add support to generate device tree node
for PCI bridges.

Add an of_pci_make_dev_node() interface that can be used to create device
tree node for PCI devices.

Add a PCI_DYNAMIC_OF_NODES config option. When the option is turned on,
the kernel will generate device tree nodes for PCI bridges unconditionally.

Initially, add the basic properties for the dynamically generated device
tree nodes which include #address-cells, #size-cells, device_type,
compatible, ranges, reg.

Acked-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
Signed-off-by: Lizhi Hou &lt;lizhi.hou@amd.com&gt;
Link: https://lore.kernel.org/r/1692120000-46900-3-git-send-email-lizhi.hou@amd.com
Signed-off-by: Rob Herring &lt;robh@kernel.org&gt;
</content>
</entry>
<entry>
<title>PCI/DOE: Add DOE mailbox support functions</title>
<updated>2022-07-19T22:38:04+00:00</updated>
<author>
<name>Jonathan Cameron</name>
<email>Jonathan.Cameron@huawei.com</email>
</author>
<published>2022-07-19T20:52:46+00:00</published>
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<id>urn:sha1:9d24322e887b6a3d3f9f9c3e76937a646102c8c1</id>
<content type='text'>
Introduced in a PCIe r6.0, sec 6.30, DOE provides a config space based
mailbox with standard protocol discovery.  Each mailbox is accessed
through a DOE Extended Capability.

Each DOE mailbox must support the DOE discovery protocol in addition to
any number of additional protocols.

Define core PCIe functionality to manage a single PCIe DOE mailbox at a
defined config space offset.  Functionality includes iterating,
creating, query of supported protocol, and task submission.  Destruction
of the mailboxes is device managed.

Cc: "Li, Ming" &lt;ming4.li@intel.com&gt;
Cc: Bjorn Helgaas &lt;helgaas@kernel.org&gt;
Cc: Matthew Wilcox &lt;willy@infradead.org&gt;
Acked-by: Bjorn Helgaas &lt;helgaas@kernel.org&gt;
Signed-off-by: Jonathan Cameron &lt;Jonathan.Cameron@huawei.com&gt;
Co-developed-by: Ira Weiny &lt;ira.weiny@intel.com&gt;
Signed-off-by: Ira Weiny &lt;ira.weiny@intel.com&gt;
Link: https://lore.kernel.org/r/20220719205249.566684-4-ira.weiny@intel.com
Signed-off-by: Dan Williams &lt;dan.j.williams@intel.com&gt;
</content>
</entry>
<entry>
<title>PCI/VGA: Move vgaarb to drivers/pci</title>
<updated>2022-03-10T00:30:46+00:00</updated>
<author>
<name>Bjorn Helgaas</name>
<email>bhelgaas@google.com</email>
</author>
<published>2022-02-24T22:47:43+00:00</published>
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<id>urn:sha1:1d38fe6ee6a874675ca3bba6b48e69a0e6176ffc</id>
<content type='text'>
The VGA arbiter is really PCI-specific and doesn't depend on any GPU
things.  Move it to the PCI subsystem.

Note that misc_init() must be called before vga_arb_device_init().  These
are both subsys_initcalls, so this ordering depends on the link order,
which is determined by drivers/Makefile:

  obj-y += pci/
  obj-y += char/        &lt;-- misc_init()
  obj-y += gpu/         &lt;-- vga_arb_device_init() (before this commit)

The drivers/pci/ subsys_initcalls are called *before* misc_init(), so
convert vga_arb_device_init() to subsys_initcall_sync(), which is called
after *all* subsys_initcalls.

Link: https://lore.kernel.org/r/20220224224753.297579-2-helgaas@kernel.org
Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
</content>
</entry>
<entry>
<title>PCI/MSI: Move code into a separate directory</title>
<updated>2021-12-09T10:52:22+00:00</updated>
<author>
<name>Thomas Gleixner</name>
<email>tglx@linutronix.de</email>
</author>
<published>2021-12-06T22:27:47+00:00</published>
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<id>urn:sha1:288c81ce4be7c15544605594966faaeb8803b5da</id>
<content type='text'>
msi.c is getting larger and really could do with a splitup. Move it into
its own directory to prepare for that.

Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Tested-by: Juergen Gross &lt;jgross@suse.com&gt;
Reviewed-by: Jason Gunthorpe &lt;jgg@nvidia.com&gt;
Acked-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
Link: https://lore.kernel.org/r/20211206210224.655043033@linutronix.de

</content>
</entry>
<entry>
<title>PCI: Apply CONFIG_PCI_DEBUG to entire drivers/pci hierarchy</title>
<updated>2021-02-09T21:10:20+00:00</updated>
<author>
<name>Junhao He</name>
<email>hejunhao2@hisilicon.com</email>
</author>
<published>2021-02-04T11:30:15+00:00</published>
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<id>urn:sha1:e8e9aababe60a12928172b5f018d15de3c2cdf31</id>
<content type='text'>
CONFIG_PCI_DEBUG=y adds -DDEBUG to CFLAGS, which enables things like
pr_debug() and dev_dbg() (and hence pci_dbg()).  Previously we added
-DDEBUG for files in drivers/pci/, but not files in subdirectories of
drivers/pci/.

Add -DDEBUG to CFLAGS for all files below drivers/pci/ so CONFIG_PCI_DEBUG
applies to the entire hierarchy.

[bhelgaas: commit log]
Link: https://lore.kernel.org/r/1612438215-33105-1-git-send-email-yangyicong@hisilicon.com
Signed-off-by: Junhao He &lt;hejunhao2@hisilicon.com&gt;
Signed-off-by: Yicong Yang &lt;yangyicong@hisilicon.com&gt;
Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
Reviewed-by: Krzysztof Wilczyński &lt;kw@linux.com&gt;
</content>
</entry>
<entry>
<title>PCI/MSI: Move MSI/MSI-X init to msi.c</title>
<updated>2020-12-04T18:08:19+00:00</updated>
<author>
<name>Bjorn Helgaas</name>
<email>bhelgaas@google.com</email>
</author>
<published>2020-12-03T18:51:08+00:00</published>
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<id>urn:sha1:cbc40d5c33af289548d2481e68a38512102cdd3e</id>
<content type='text'>
Move pci_msi_setup_pci_dev(), which disables MSI and MSI-X interrupts, from
probe.c to msi.c so it's with all the other MSI code and more consistent
with other capability initialization.  This means we must compile msi.c
always, even without CONFIG_PCI_MSI, so wrap the rest of msi.c in an #ifdef
and adjust the Makefile accordingly.  No functional change intended.

Link: https://lore.kernel.org/r/20201203185110.1583077-2-helgaas@kernel.org
Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
Reviewed-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>PCI: Allow building PCIe things without PCIEPORTBUS</title>
<updated>2019-11-21T13:52:33+00:00</updated>
<author>
<name>Bjorn Helgaas</name>
<email>bhelgaas@google.com</email>
</author>
<published>2019-11-06T22:13:43+00:00</published>
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<id>urn:sha1:b7da3d4df05232d637eff1c0874d20996b98769c</id>
<content type='text'>
Some things in drivers/pci/pcie (aspm.c and ptm.c) do not depend on the
PCIe portdrv, so we should be able to build them even if PCIEPORTBUS is not
selected.  Remove the PCIEPORTBUS guard from building pcie/.

Link: https://lore.kernel.org/r/20191106222420.10216-6-helgaas@kernel.org
Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
Reviewed-by: Andrew Murray &lt;andrew.murray@arm.com&gt;
</content>
</entry>
<entry>
<title>PCI: OF: Allow of_pci_get_max_link_speed() to be used by PCI Endpoint drivers</title>
<updated>2019-04-15T12:24:02+00:00</updated>
<author>
<name>Kishon Vijay Abraham I</name>
<email>kishon@ti.com</email>
</author>
<published>2019-03-25T09:39:37+00:00</published>
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<id>urn:sha1:40e5d614a0cdbf50dc3caa7eb10bd838edcb3ba5</id>
<content type='text'>
of_pci_get_max_link_speed() is built only if CONFIG_PCI is enabled.
Make of_pci_get_max_link_speed() to be also used by PCI Endpoint
controllers with just CONFIG_PCI_ENDPOINT enabled.

Signed-off-by: Kishon Vijay Abraham I &lt;kishon@ti.com&gt;
Signed-off-by: Sekhar Nori &lt;nsekhar@ti.com&gt;
Signed-off-by: Lorenzo Pieralisi &lt;lorenzo.pieralisi@arm.com&gt;
Acked-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
</content>
</entry>
<entry>
<title>PCI/ACPI: Allow ACPI to be built without CONFIG_PCI set</title>
<updated>2018-12-20T09:19:49+00:00</updated>
<author>
<name>Sinan Kaya</name>
<email>okaya@kernel.org</email>
</author>
<published>2018-12-19T22:46:56+00:00</published>
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<id>urn:sha1:5d32a66541c4683456507481a0944ed2985e75c7</id>
<content type='text'>
We are compiling PCI code today for systems with ACPI and no PCI
device present. Remove the useless code and reduce the tight
dependency.

Signed-off-by: Sinan Kaya &lt;okaya@kernel.org&gt;
Acked-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt; # PCI parts
Acked-by: Ingo Molnar &lt;mingo@kernel.org&gt;
Signed-off-by: Rafael J. Wysocki &lt;rafael.j.wysocki@intel.com&gt;
</content>
</entry>
<entry>
<title>Merge branch 'remotes/lorenzo/pci/controller-misc'</title>
<updated>2018-10-20T16:45:47+00:00</updated>
<author>
<name>Bjorn Helgaas</name>
<email>bhelgaas@google.com</email>
</author>
<published>2018-10-20T16:45:47+00:00</published>
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<id>urn:sha1:b7c18dc06ad12059abc0961522d446553f8a755b</id>
<content type='text'>
  - Remove redundant controller tests for "device_type == pci" (Rob
    Herring)

  - Document R-Car E3 (R8A77990) bindings (Tho Vu)

  - Add device tree support for R-Car r8a7744 (Biju Das)

  - Drop unused mvebu PCIe capability code (Thomas Petazzoni)

  - Add shared PCI bridge emulation code (Thomas Petazzoni)

  - Convert mvebu to use shared PCI bridge emulation (Thomas Petazzoni)

  - Add aardvark Root Port emulation (Thomas Petazzoni)

* remotes/lorenzo/pci/controller-misc:
  PCI: aardvark: Implement emulated root PCI bridge config space
  PCI: mvebu: Convert to PCI emulated bridge config space
  PCI: mvebu: Drop unused PCI express capability code
  PCI: Introduce PCI bridge emulated config space common logic
  dt-bindings: PCI: rcar: Add device tree support for r8a7744
  dt-bindings: PCI: rcar: Add device tree support for r8a7744
  DT: pci: rcar-pci: document R8A77990 bindings
  PCI: Remove unnecessary check of device_type == pci
</content>
</entry>
</feed>
