kernel/linux.git/drivers/net/phy/realtek.c, branch v5.19

net: phy: realtek: add support for RTL8365MB-VC internal PHYs

2021-10-18T13:02:56+00:00

The RTL8365MB-VC ethernet switch controller has 4 internal PHYs for its user-facing ports. All that is needed is to let the PHY driver core pick up the IRQ made available by the switch driver. Signed-off-by: Alvin Šipraga Reviewed-by: Florian Fainelli Reviewed-by: Linus Walleij Signed-off-by: David S. Miller

net: phy: realtek: net: Fix less than zero comparison of a u16

2021-06-09T22:32:08+00:00

The comparisons of the u16 values priv->phycr1 and priv->phycr2 to less than zero always false because they are unsigned. Fix this by using an int for the assignment and less than zero check. Addresses-Coverity: ("Unsigned compared against 0") Fixes: 0a4355c2b7f8 ("net: phy: realtek: add dt property to disable CLKOUT clock") Fixes: d90db36a9e74 ("net: phy: realtek: add dt property to enable ALDPS mode") Signed-off-by: Colin Ian King Signed-off-by: David S. Miller

net: phy: realtek: add delay to fix RXC generation issue

2021-06-08T18:41:24+00:00

PHY will delay about 11.5ms to generate RXC clock when switching from power down to normal operation. Read/write registers would also cause RXC become unstable and stop for a while during this process. Realtek engineer suggests 15ms or more delay can workaround this issue. Signed-off-by: Joakim Zhang Signed-off-by: David S. Miller

net: phy: realtek: add dt property to enable ALDPS mode

2021-06-08T18:41:24+00:00

If enable Advance Link Down Power Saving (ALDPS) mode, it will change crystal/clock behavior, which cause RXC clock stop for dozens to hundreds of miliseconds. This is comfirmed by Realtek engineer. For some MACs, it needs RXC clock to support RX logic, after this patch, PHY can generate continuous RXC clock during auto-negotiation. ALDPS default is disabled after hardware reset, it's more reasonable to add a property to enable this feature, since ALDPS would introduce side effect. This patch adds dt property "realtek,aldps-enable" to enable ALDPS mode per users' requirement. Jisheng Zhang enables this feature, changes the default behavior. Since mine patch breaks the rule that new implementation should not break existing design, so Cc'ed let him know to see if it can be accepted. Cc: Jisheng Zhang Signed-off-by: Joakim Zhang Signed-off-by: David S. Miller

net: phy: realtek: add dt property to disable CLKOUT clock

2021-06-08T18:41:23+00:00

CLKOUT is enabled by default after PHY hardware reset, this patch adds "realtek,clkout-disable" property for user to disable CLKOUT clock to save PHY power. Per RTL8211F guide, a PHY reset should be issued after setting these bits in PHYCR2 register. After this patch, CLKOUT clock output to be disabled. Signed-off-by: Joakim Zhang Signed-off-by: David S. Miller

net: phy: realtek: Add support for RTL9000AA/AN

2021-01-23T02:06:42+00:00

RTL9000AA/AN as 100BASE-T1 is following: - 100 Mbps - Full duplex - Link Status Change Interrupt - Master/Slave configuration Signed-off-by: Yuusuke Ashizuka Signed-off-by: Torii Kenichi Reviewed-by: Andrew Lunn Link: https://lore.kernel.org/r/20210121080254.21286-1-ashiduka@fujitsu.com Signed-off-by: Jakub Kicinski

net: phy: realtek: read actual speed on rtl8211f to detect downshift

2020-11-25T20:29:40+00:00

The rtl8211f supports downshift and before commit 5502b218e001 ("net: phy: use phy_resolve_aneg_linkmode in genphy_read_status") the read-back of register MII_CTRL1000 was used to detect the negotiated link speed. The code added in commit d445dff2df60 ("net: phy: realtek: read actual speed to detect downshift") is working fine also for this phy and it's trivial re-using it to restore the downshift detection on rtl8211f. Add the phy specific read_status() pointing to the existing function rtlgen_read_status(). Signed-off-by: Antonio Borneo Link: https://lore.kernel.org/r/478f871a-583d-01f1-9cc5-2eea56d8c2a7@huawei.com Tested-by: Yonglong Liu Link: https://lore.kernel.org/r/20201124230756.887925-1-antonio.borneo@st.com Signed-off-by: Jakub Kicinski

Merge https://git.kernel.org/pub/scm/linux/kernel/git/netdev/net

2020-11-13T00:54:48+00:00

Signed-off-by: Jakub Kicinski

net: phy: realtek: support paged operations on RTL8201CP

2020-11-11T00:11:39+00:00

The RTL8401-internal PHY identifies as RTL8201CP, and the init sequence in r8169, copied from vendor driver r8168, uses paged operations. Therefore set the same paged operation callbacks as for the other Realtek PHY's. Fixes: cdafdc29ef75 ("r8169: sync support for RTL8401 with vendor driver") Signed-off-by: Heiner Kallweit Link: https://lore.kernel.org/r/69882f7a-ca2f-e0c7-ae83-c9b6937282cd@gmail.com Signed-off-by: Jakub Kicinski

net: phy: realtek: remove the use of .ack_interrupt()

2020-11-06T00:32:39+00:00

In preparation of removing the .ack_interrupt() callback, we must replace its occurrences (aka phy_clear_interrupt), from the 2 places where it is called from (phy_enable_interrupts and phy_disable_interrupts), with equivalent functionality. This means that clearing interrupts now becomes something that the PHY driver is responsible of doing, before enabling interrupts and after clearing them. Make this driver follow the new contract. Cc: Martin Blumenstingl Cc: Willy Liu Signed-off-by: Ioana Ciornei Signed-off-by: Jakub Kicinski