kernel/linux.git/drivers/net/phy/mscc, branch linux-5.11.y

net: phy: mscc: coma mode disabled for VSC8514

2021-03-04T11:14:04+00:00

[ Upstream commit ca0d7fd0a58dfc9503775dae7daee341c115e0c7 ] The 'coma mode' (configurable through sw or hw) provides an optional feature that may be used to control when the PHYs become active. The typical usage is to synchronize the link-up time across all PHY instances. This patch releases coma mode if not done by hardware, otherwise the phys will not link-up. Fixes: e4f9ba642f0b ("net: phy: mscc: add support for VSC8514 PHY.") Signed-off-by: Steen Hegelund Signed-off-by: Bjarni Jonasson Signed-off-by: David S. Miller Signed-off-by: Sasha Levin

net: phy: mscc: improved serdes calibration applied to VSC8514

2021-03-04T11:14:04+00:00

[ Upstream commit 85e97f0b984eb36cba0ecaf87c66a9f7445d73dc ] The current IB serdes calibration algorithm (performed by the onboard 8051) has proven to be unstable for the VSC8514 QSGMII phy. A new algorithm has been developed based on 'Frequency-offset Jittered-Injection' or 'FoJi' method which solves all known issues. This patch disables the 8051 algorithm and replaces it with the new FoJi algorithm. The calibration is now performed in a new file (mscc_serdes.c), which can act as an placeholder for future serdes configurations. Fixes: e4f9ba642f0b ("net: phy: mscc: add support for VSC8514 PHY.") Signed-off-by: Steen Hegelund Signed-off-by: Bjarni Jonasson Tested-by: Vladimir Oltean Signed-off-by: David S. Miller Signed-off-by: Sasha Levin

net: phy: mscc: adding LCPLL reset to VSC8514

2021-03-04T11:13:57+00:00

[ Upstream commit 3cc2c646be0b22037f31c958e96c0544a073d108 ] At Power-On Reset, transients may cause the LCPLL to lock onto a clock that is momentarily unstable. This is normally seen in QSGMII setups where the higher speed 6G SerDes is being used. This patch adds an initial LCPLL Reset to the PHY (first instance) to avoid this issue. Fixes: e4f9ba642f0b ("net: phy: mscc: add support for VSC8514 PHY.") Signed-off-by: Steen Hegelund Signed-off-by: Bjarni Jonasson Signed-off-by: David S. Miller Signed-off-by: Sasha Levin

net: phy: mscc: use new PTP_MSGTYPE_* defines

2020-11-25T20:23:21+00:00

Use recently introduced PTP_MSGTYPE_SYNC and PTP_MSGTYPE_DELAY_REQ defines instead of a driver internal enumeration. Signed-off-by: Christian Eggers Reviewed-by: Antoine Tenart Acked-by: Richard Cochran Signed-off-by: Jakub Kicinski

Merge https://git.kernel.org/pub/scm/linux/kernel/git/netdev/net

2020-11-20T03:08:46+00:00

Signed-off-by: Jakub Kicinski

net: phy: mscc: fix excluded_middle.cocci warnings

2020-11-17T17:27:39+00:00

Condition !A || A && B is equivalent to !A || B. Generated by: scripts/coccinelle/misc/excluded_middle.cocci Reported-by: kernel test robot Signed-off-by: kernel test robot Signed-off-by: Julia Lawall Reviewed-by: Antoine Tenart Link: https://lore.kernel.org/r/alpine.DEB.2.22.394.2011161633240.2682@hadrien Signed-off-by: Jakub Kicinski

net: phy: mscc: Add PTP support for 2 more VSC PHYs

2020-11-14T02:25:34+00:00

Add VSC8572 and VSC8574 in the PTP configuration as they also support PTP. The relevant datasheets can be found here: - VSC8572: https://www.microchip.com/wwwproducts/en/VSC8572 - VSC8574: https://www.microchip.com/wwwproducts/en/VSC8574 Signed-off-by: Steen Hegelund Link: https://lore.kernel.org/r/20201112092250.914079-1-steen.hegelund@microchip.com Signed-off-by: Jakub Kicinski

net: phy: mscc: remove non-MACSec compatible phy

2020-11-13T23:08:07+00:00

Selecting VSC8575 as a MACSec PHY was not correct The relevant datasheet can be found here: - VSC8575: https://www.microchip.com/wwwproducts/en/VSC8575 History: v1 -> v2: - Corrected the sha in the "Fixes:" tag Fixes: 1bbe0ecc2a1a ("net: phy: mscc: macsec initialization") Signed-off-by: Steen Hegelund Reviewed-by: Antoine Tenart Link: https://lore.kernel.org/r/20201113091116.1102450-1-steen.hegelund@microchip.com Signed-off-by: Jakub Kicinski

net: phy: mscc: remove the use of .ack_interrupt()

2020-11-06T00:32:00+00:00

In preparation of removing the .ack_interrupt() callback, we must replace its occurrences (aka phy_clear_interrupt), from the 2 places where it is called from (phy_enable_interrupts and phy_disable_interrupts), with equivalent functionality. This means that clearing interrupts now becomes something that the PHY driver is responsible of doing, before enabling interrupts and after clearing them. Make this driver follow the new contract. Cc: Antoine Tenart Signed-off-by: Ioana Ciornei Tested-by: Vladimir Oltean # VSC8514 Signed-off-by: Jakub Kicinski

net: phy: mscc: implement generic .handle_interrupt() callback

2020-11-06T00:32:00+00:00

In an attempt to actually support shared IRQs in phylib, we now move the responsibility of triggering the phylib state machine or just returning IRQ_NONE, based on the IRQ status register, to the PHY driver. Having 3 different IRQ handling callbacks (.handle_interrupt(), .did_interrupt() and .ack_interrupt() ) is confusing so let the PHY driver implement directly an IRQ handler like any other device driver. Make this driver follow the new convention. Also, remove the .did_interrupt() callback since it's not anymore used. Signed-off-by: Ioana Ciornei Tested-by: Vladimir Oltean # VSC8514 Signed-off-by: Jakub Kicinski