kernel/linux.git/drivers/net/phy/microchip_t1.c, branch linux-7.0.y

net: phy: microchip_t1: Enable pin out specific to lan887x phy for PEROUT signal

2025-01-17T01:27:56+00:00

Adds support for enabling pin out that is required to generate periodic output signal on lan887x phy. Signed-off-by: Divya Koppera Link: https://patch.msgid.link/20250115090634.12941-3-divya.koppera@microchip.com Signed-off-by: Jakub Kicinski

net: phy: Constify struct mdio_device_id

2025-01-14T23:01:32+00:00

'struct mdio_device_id' is not modified in these drivers. Constifying these structures moves some data to a read-only section, so increase overall security. On a x86_64, with allmodconfig, as an example: Before: ====== text data bss dec hex filename 27014 12792 0 39806 9b7e drivers/net/phy/broadcom.o After: ===== text data bss dec hex filename 27206 12600 0 39806 9b7e drivers/net/phy/broadcom.o Signed-off-by: Christophe JAILLET Reviewed-by: Andrew Lunn Link: https://patch.msgid.link/403c381b7d9156b67ad68ffc44b8eee70c5e86a9.1736691226.git.christophe.jaillet@wanadoo.fr Signed-off-by: Jakub Kicinski

net: phy: microchip_t1 : Add initialization of ptp for lan887x

2024-12-23T18:30:59+00:00

Add initialization of ptp for lan887x. Reviewed-by: Andrew Lunn Signed-off-by: Divya Koppera Link: https://patch.msgid.link/20241219123311.30213-6-divya.koppera@microchip.com Signed-off-by: Jakub Kicinski

net: phy: microchip_t1: Clause-45 PHY loopback support for LAN887x

2024-11-15T23:22:10+00:00

Adds support for clause-45 PHY loopback for the Microchip LAN887x driver. Signed-off-by: Tarun Alle Reviewed-by: Andrew Lunn Link: https://patch.msgid.link/20241114101951.382996-1-Tarun.Alle@microchip.com Signed-off-by: Jakub Kicinski

net: phy: microchip_t1: SQI support for LAN887x

2024-10-09T01:24:16+00:00

Add support for measuring Signal Quality Index for LAN887x T1 PHY. Signal Quality Index (SQI) is measure of Link Channel Quality from 0 to 7, with 7 as the best. By default, a link loss event shall indicate an SQI of 0. Signed-off-by: Tarun Alle Reviewed-by: Andrew Lunn Link: https://patch.msgid.link/20241007063943.3233-1-tarun.alle@microchip.com Signed-off-by: Jakub Kicinski

net: phy: microchip_t1: Interrupt support for lan887x

2024-10-03T23:22:12+00:00

Add support for link up and link down interrupts in lan887x. Signed-off-by: Divya Koppera Reviewed-by: Andrew Lunn Reviewed-by: Kalesh AP Link: https://patch.msgid.link/20241001144421.6661-1-divya.koppera@microchip.com Signed-off-by: Jakub Kicinski

net: phy: microchip_t1: Cable Diagnostics for lan887x

2024-09-12T03:21:07+00:00

Add support for cable diagnostics in lan887x PHY. Using this we can diagnose connected/open/short wires and also length where cable fault is occurred. Signed-off-by: Divya Koppera Reviewed-by: Andrew Lunn Link: https://patch.msgid.link/20240909114339.3446-1-divya.koppera@microchip.com Signed-off-by: Jakub Kicinski

net: phy: microchip_t1: Adds support for lan887x phy

2024-08-26T16:21:15+00:00

The LAN887x is a Single-Port Ethernet Physical Layer Transceiver compliant with the IEEE 802.3bw (100BASE-T1) and IEEE 802.3bp (1000BASE-T1) specifications. The device provides 100/1000 Mbit/s transmit and receive capability over a single Unshielded Twisted Pair (UTP) cable. It supports communication with an Ethernet MAC via standard RGMII/SGMII interfaces. LAN887x supports following features, - Events/Interrupts - LED/GPIO Operation - IEEE 1588 (PTP) - SQI - Sleep and Wakeup (TC10) - Cable Diagnostics First patch only supports 100Mbps and 1000Mbps force-mode. Reviewed-by: Andrew Lunn Signed-off-by: Divya Koppera Link: https://patch.msgid.link/20240821055906.27717-3-Divya.Koppera@microchip.com Signed-off-by: Jakub Kicinski

net: phy: microchip: lan87xx: reinit PHY after cable test

2024-07-09T03:22:13+00:00

Reinit PHY after cable test, otherwise link can't be established on tested port. This issue is reproducible on LAN9372 switches with integrated 100BaseT1 PHYs. Fixes: 788050256c411 ("net: phy: microchip_t1: add cable test support for lan87xx phy") Signed-off-by: Oleksij Rempel Reviewed-by: Andrew Lunn Reviewed-by: Michal Kubiak Reviewed-by: Florian Fainelli Link: https://patch.msgid.link/20240705084954.83048-1-o.rempel@pengutronix.de Signed-off-by: Jakub Kicinski

net: phy: microchip: run phy initialization during each link update

2023-01-24T06:34:19+00:00

PHY initialization is supposed to run on every mode changes. "lan87xx_config_aneg()" verifies every mode change using "phy_modify_changed()" function. Earlier code had phy_modify_changed() followed by genphy_soft_reset. But soft_reset resets all the pre-configured register values to default state, and lost all the initialization done. With this reason gen_phy_reset was removed. But it need to go through init sequence each time the mode changed. Update lan87xx_config_aneg() to invoke phy_init once successful mode update is detected. PHY init sequence added in lan87xx_phy_init() have slave init commands executed every time. Update the init sequence to run slave init only if phydev is in slave mode. Test setup contains LAN9370 EVB connected to SAMA5D3 (Running DSA), and issue can be reproduced by connecting link to any of the available ports after SAMA5D3 boot-up. With this issue, port will fail to update link state. But once the SAMA5D3 is reset with LAN9370 link in connected state itself, on boot-up link state will be reported as UP. But Again after some time, if link is moved to DOWN state, it will not get reported. Signed-off-by: Rakesh Sankaranarayanan Reviewed-by: Andrew Lunn Link: https://lore.kernel.org/r/20230120104733.724701-1-rakesh.sankaranarayanan@microchip.com Signed-off-by: Jakub Kicinski