kernel/linux.git/drivers/net/phy/mediatek, branch v6.19.11

net: phy: mediatek: fix nvmem cell reference leak in mt798x_phy_calibration

2025-12-22T11:18:54+00:00

When nvmem_cell_read() fails in mt798x_phy_calibration(), the function returns without calling nvmem_cell_put(), leaking the cell reference. Move nvmem_cell_put() right after nvmem_cell_read() to ensure the cell reference is always released regardless of the read result. Found via static analysis and code review. Fixes: 98c485eaf509 ("net: phy: add driver for MediaTek SoC built-in GE PHYs") Cc: stable@vger.kernel.org Signed-off-by: Miaoqian Lin Reviewed-by: Daniel Golle Reviewed-by: Andrew Lunn Link: https://patch.msgid.link/20251211081313.2368460-1-linmq006@gmail.com Signed-off-by: Paolo Abeni

net: phy: mtk-2p5ge: Add LED support for MT7988

2025-08-28T23:43:21+00:00

Add LED support for MT7988's built-in 2.5Gphy. LED hardware has almost the same design with MT7981's/MT7988's built-in GbE. So hook the same helper function here. Before mtk_phy_leds_state_init(), set correct default values of LED0 and LED1. Signed-off-by: Sky Huang Reviewed-by: Andrew Lunn Link: https://patch.msgid.link/20250827044755.3256991-1-SkyLake.Huang@mediatek.com Signed-off-by: Jakub Kicinski

net: phy: add Kconfig symbol PHY_PACKAGE

2025-06-16T21:59:30+00:00

Only a handful of PHY drivers needs the PHY package functionality, therefore build the module only if needed. Signed-off-by: Heiner Kallweit Link: https://patch.msgid.link/42c05496-61b2-4b09-b853-3d99b3dfe95c@gmail.com Signed-off-by: Jakub Kicinski

net: phy: mediatek: Add Airoha AN7583 PHY support

2025-05-28T00:07:53+00:00

Add Airoha AN7583 PHY support based on Airoha AN7581 with the small difference that BMCR_PDOWN is enabled by default and needs to be cleared to make the internal PHY correctly work. Signed-off-by: Christian Marangi Reviewed-by: Andrew Lunn Link: https://patch.msgid.link/20250522165313.6411-4-ansuelsmth@gmail.com Signed-off-by: Jakub Kicinski

net: phy: mediatek: add driver for built-in 2.5G ethernet PHY on MT7988

2025-05-21T01:11:04+00:00

Add support for internal 2.5Gphy on MT7988. This driver will load necessary firmware and add appropriate time delay to make sure that firmware works stably. The firmware loading procedure takes about 11ms in this driver. Signed-off-by: Sky Huang Reviewed-by: Andrew Lunn Link: https://patch.msgid.link/20250516102327.2014531-3-SkyLake.Huang@mediatek.com Signed-off-by: Jakub Kicinski

net: phy: mediatek: Sort config and file names in Kconfig and Makefile

2025-05-21T01:11:04+00:00

Sort config and file names in Kconfig and Makefile in drivers/net/phy/mediatek/ in alphabetical order. Signed-off-by: Sky Huang Reviewed-by: Andrew Lunn Link: https://patch.msgid.link/20250516102327.2014531-2-SkyLake.Huang@mediatek.com Signed-off-by: Jakub Kicinski

net: phy: mediatek: do not require syscon compatible for pio property

2025-05-16T22:40:51+00:00

Current implementation requires syscon compatible for pio property which is used for driving the switch leds on mt7988. Replace syscon_regmap_lookup_by_phandle with of_parse_phandle and device_node_to_regmap to get the regmap already assigned by pinctrl driver. Signed-off-by: Frank Wunderlich Link: https://patch.msgid.link/20250510174933.154589-1-linux@fw-web.de Signed-off-by: Jakub Kicinski

net: phy: mediatek: init val in .phy_led_polarity_set for AN7581

2025-04-17T01:26:42+00:00

Fix smatch warning for uninitialised val in .phy_led_polarity_set for AN7581 driver. Correctly init to 0 to set polarity high by default. Reported-by: Simon Horman Fixes: 6a325aed130b ("net: phy: mediatek: add Airoha PHY ID to SoC driver") Signed-off-by: Christian Marangi Link: https://patch.msgid.link/20250415105313.3409-1-ansuelsmth@gmail.com Signed-off-by: Jakub Kicinski

net: phy: mediatek: add Airoha PHY ID to SoC driver

2025-04-12T03:18:31+00:00

Airoha AN7581 SoC ship with a Switch based on the MT753x Switch embedded in other SoC like the MT7581 and the MT7988. Similar to these they require configuring some pin to enable LED PHYs. Add support for the PHY ID for the Airoha embedded Switch and define a simple probe function to toggle these pins. Also fill the LED functions and add dedicated function to define LED polarity. Reviewed-by: Andrew Lunn Signed-off-by: Christian Marangi Link: https://patch.msgid.link/20250410100410.348-2-ansuelsmth@gmail.com Signed-off-by: Jakub Kicinski

net: phy: mediatek: permit to compile test GE SOC PHY driver

2025-04-12T03:18:31+00:00

When commit 462a3daad679 ("net: phy: mediatek: fix compile-test dependencies") fixed the dependency, it should have also introduced an or on COMPILE_TEST to permit this driver to be compile-tested even if NVMEM_MTK_EFUSE wasn't selected. The driver makes use of NVMEM API that are always compiled (return error) so the driver can actually be compiled even without that config. Fix and simplify the dependency condition of this kernel config. Fixes: 462a3daad679 ("net: phy: mediatek: fix compile-test dependencies") Acked-by: Daniel Golle Reviewed-by: Andrew Lunn Signed-off-by: Christian Marangi Acked-by: Arnd Bergmann Link: https://patch.msgid.link/20250410100410.348-1-ansuelsmth@gmail.com Signed-off-by: Jakub Kicinski