kernel/linux.git/drivers/net/ipa/reg, branch v6.6.132

net: ipa: fix one GSI register field width

2023-12-03T06:33:05+00:00

[ Upstream commit 37f0205538baf70beb57cdcb6c7d14aa13257926 ] The width of the R_LENGTH field of the EV_CH_E_CNTXT_1 GSI register is 24 bits (not 20 bits) starting with IPA v5.0. Fix this. Fixes: faf0678ec8a0 ("net: ipa: add IPA v5.0 GSI register definitions") Signed-off-by: Alex Elder Link: https://lore.kernel.org/r/20231122231708.896632-1-elder@linaro.org Signed-off-by: Jakub Kicinski Signed-off-by: Sasha Levin

net: ipa: add IPA v5.0 GSI register definitions

2023-03-23T05:44:00+00:00

Add the definitions of GSI register offsets and fields for IPA v5.0. These are used for the SDX65 SoC. Increase the maximum channel and event ring counts supported by the driver, so those implemented by the SDX65 are supported. Signed-off-by: Alex Elder Signed-off-by: Jakub Kicinski

net: ipa: add IPA v5.0 register definitions

2023-03-23T05:44:00+00:00

Add the definitions of IPA register offsets and fields for IPA v5.0. These are used for the SDX65 SoC. In the Makefile, split IPA_VERSIONS to use IPA_REG_VERSIONS and IPA_DATA_VERSIONS instead, to allow IPA register definitions for a new version to be added separate from the IPA data. Rename GSI_IPA_VERSIONS to be GSI_REG_VERSIONS for consistency. Signed-off-by: Alex Elder Signed-off-by: Jakub Kicinski

net: ipa: fix a surprising number of bad offsets

2023-03-14T00:11:43+00:00

A recent commit eliminated a hack that adjusted the offset used for many GSI registers. It became possible because we now specify all GSI register offsets explicitly for every version of IPA. Unfortunately, a large number of register offsets were *not* updated as they should have been in that commit. For IPA v4.5+, the offset for every GSI register *except* the two inter-EE interrupt masking registers were supposed to have been reduced by 0xd000. Tested-by: Luca Weiss Tested-by: Dmitry Baryshkov # SM8350-HDK Fixes: 59b12b1d27f3 ("net: ipa: kill gsi->virt_raw") Signed-off-by: Alex Elder Link: https://lore.kernel.org/r/20230310193709.1477102-1-elder@linaro.org Signed-off-by: Jakub Kicinski

net: ipa: kill ev_ch_e_cntxt_1_length_encode()

2023-02-20T07:14:20+00:00

Now that we explicitly define each register field width there is no need to have a special encoding function for the event ring length. Add a field for this to the EV_CH_E_CNTXT_1 GSI register, and use it in place of ev_ch_e_cntxt_1_length_encode() (which can be removed). Signed-off-by: Alex Elder Signed-off-by: Paolo Abeni

net: ipa: kill gsi->virt_raw

2023-02-20T07:14:20+00:00

Starting at IPA v4.5, almost all GSI registers had their offsets changed by a fixed amount (shifted downward by 0xd000). Rather than defining offsets for all those registers dependent on version, an adjustment was applied for most register accesses. This was implemented in commit cdeee49f3ef7f ("net: ipa: adjust GSI register addresses"). It was later modified to be a bit more obvious about the adjusment, in commit 571b1e7e58ad3 ("net: ipa: use a separate pointer for adjusted GSI memory"). We now are able to define every GSI register with its own offset, so there's no need to implement this special adjustment. So get rid of the "virt_raw" pointer, and just maintain "virt" as the (non-adjusted) base address of I/O mapped GSI register memory. Redefine the offsets of all GSI registers (other than the INTER_EE ones, which were not subject to the adjustment) for IPA v4.5+, subtracting 0xd000 from their defined offsets instead. Move the ERROR_LOG and ERROR_LOG_CLR definitions further down in the register definition files so all registers are defined in order of their offset. Signed-off-by: Alex Elder Signed-off-by: Paolo Abeni

net: ipa: define fields for remaining GSI registers

2023-02-15T04:39:39+00:00

Define field IDs for the remaining GSI registers, and populate the register definition files accordingly. Use the reg_*() functions to access field values for those regiters, and get rid of the previous field definition constants. Signed-off-by: Alex Elder Signed-off-by: Jakub Kicinski

net: ipa: add "gsi_v4.11.c"

2023-02-15T04:39:39+00:00

The next patch adds a GSI register field that is only valid starting at IPA v4.11. Create "gsi_v4.11.c" from "gsi_v4.9.c", changing only the name of the public regs structure it defines. Signed-off-by: Alex Elder Signed-off-by: Jakub Kicinski

net: ipa: define fields for event-ring related registers

2023-02-15T04:39:38+00:00

Define field IDs for the EV_CH_E_CNTXT_0 and EV_CH_E_CNTXT_8 GSI registers, and populate the register definition files accordingly. Use the reg_*() functions to access field values for those regiters, and get rid of the previous field definition constants. The remaining EV_CH_E_CNTXT_* registers are written with full 32-bit values (and have no fields). Signed-off-by: Alex Elder Signed-off-by: Jakub Kicinski

net: ipa: define more fields for GSI registers

2023-02-15T04:39:38+00:00

Beyond the CH_C_QOS register, two other registers whose offset is related to channel number have fields within them. Define the fields within the CH_C_CNTXT_0 GSI register, using an enumerated type to identify the register's fields, and define an array of field masks to use for that register's reg structure. For the CH_C_CNTXT_1 GSI register, ch_c_cntxt_1_length_encode() previously hid the difference in bit width in the channel ring length field. Instead, define a new field CH_R_LENGTH and encode the ring size with reg_encode(). Signed-off-by: Alex Elder Signed-off-by: Jakub Kicinski