kernel/linux.git/drivers/net/ipa/ipa_reg.h, branch v6.6.131

net: ipa: add IPA v5.0 register definitions

2023-03-23T05:44:00+00:00

Add the definitions of IPA register offsets and fields for IPA v5.0. These are used for the SDX65 SoC. In the Makefile, split IPA_VERSIONS to use IPA_REG_VERSIONS and IPA_DATA_VERSIONS instead, to allow IPA register definitions for a new version to be added separate from the IPA data. Rename GSI_IPA_VERSIONS to be GSI_REG_VERSIONS for consistency. Signed-off-by: Alex Elder Signed-off-by: Jakub Kicinski

net: ipa: fix some register validity checks

2023-03-17T04:33:18+00:00

A recent commit defined HW_PARAM_4 as a GSI register ID but did not add it to gsi_reg_id_valid() to indicate it's valid (for IPA v5.0+). Add version checks for the HW_PARAM_2 and INTER_EE IRQ GSI registers there as well. IPA v5.0 supports up to 8 source and destination resource groups. Update the validity check (and the comments where the register IDs are defined) to reflect that. Similarly update comments and validity checks for the hash/cache-related registers. Note that this patch fixes an omission and constrains things further, but these don't technically represent bugs. Fixes: f651334e1ef5 ("net: ipa: add HW_PARAM_4 GSI register") Signed-off-by: Alex Elder Signed-off-by: Jakub Kicinski

net: ipa: kill FILT_ROUT_CACHE_CFG IPA register

2023-03-17T04:33:18+00:00

A recent commit defined a few IPA registers used for IPA v5.0+. One of those was a mistake. Although the filter and router caches get *flushed* using a single register, they use distinct registers (ENDP_FILTER_CACHE_CFG and ENDP_ROUTER_CACHE_CFG) for configuration. And although there *exists* a FILT_ROUT_CACHE_CFG register, it is not needed in upstream code. So get rid of definitions related to FILT_ROUT_CACHE_CFG, because they are not needed. Fixes: 8ba59716d16a ("net: ipa: define IPA v5.0+ registers") Signed-off-by: Alex Elder Signed-off-by: Jakub Kicinski

net: ipa: generalize register field functions

2023-02-10T08:06:32+00:00

Rename functions related to register fields so they don't appear to be IPA-specific, and move their definitions into "reg.h": ipa_reg_fmask() -> reg_fmask() ipa_reg_bit() -> reg_bit() ipa_reg_field_max() -> reg_field_max() ipa_reg_encode() -> reg_encode() ipa_reg_decode() -> reg_decode() Signed-off-by: Alex Elder Signed-off-by: David S. Miller

net: ipa: generalize register offset functions

2023-02-10T08:06:32+00:00

Rename ipa_reg_offset() to be reg_offset() and move its definition to "reg.h". Rename ipa_reg_n_offset() to be reg_n_offset() also. Signed-off-by: Alex Elder Signed-off-by: David S. Miller

net: ipa: start generalizing "ipa_reg"

2023-02-10T08:06:32+00:00

IPA register definitions have evolved with each new version. The changes required to support more than 32 endpoints in IPA v5.0 made it best to define a unified mechanism for defining registers and their fields. GSI register definitions, meanwhile, have remained fairly stable. And even as the total number of IPA endpoints goes beyond 32, the number of GSI channels on a given EE that underly endpoints still remains 32 or less. Despite that, GSI v3.0 (which is used with IPA v5.0) extends the number of channels (and events) it supports to be about 256, and as a result, many GSI register definitions must change significantly. To address this, we'll use the same "ipa_reg" mechanism to define the GSI registers. As a first step in generalizing the "ipa_reg" to also support GSI registers, isolate the definitions of the "ipa_reg" and "ipa_regs" structure types (and some supporting macros) into a new header file, and remove the "ipa_" and "IPA_" from symbol names. Separate the IPA register ID validity checking from the generic check that a register ID is in range. Aside from that, this is intended to have no functional effect on the code. Signed-off-by: Alex Elder Signed-off-by: David S. Miller

net: ipa: define IPA v5.0+ registers

2023-02-01T05:45:51+00:00

Define some new registers that appear starting with IPA v5.0, along with enumerated types identifying their fields. Code that uses these will be added by upcoming patches. Most of the new registers are related to filter and routing tables, and in particular, their "hashed" variant. These tables are better described as "cached", where a hash value determines which entries are cached. From now on, naming related to this functionality will use "cache" instead of "hash", and that is reflected in these new register names. Some registers for managing these caches and their contents have changed as well. A few other new field definitions for registers (unrelated to table caches) are also defined. Signed-off-by: Alex Elder Reviewed-by: Leon Romanovsky Signed-off-by: Jakub Kicinski

net: ipa: rename the NAT enumerated type

2023-01-27T11:16:29+00:00

Rename the ipa_nat_en enumerated type to be ipa_nat_type, and rename its symbols accordingly. Add a comment indicating those values are also used in the IPA status nat_type field. Signed-off-by: Alex Elder Signed-off-by: David S. Miller

net: ipa: add IPA v4.7 support

2022-12-12T23:55:06+00:00

Add the necessary register and data definitions needed for IPA v4.7, which is found on the SM6350 SoC. Co-developed-by: Luca Weiss Signed-off-by: Luca Weiss Signed-off-by: Alex Elder Signed-off-by: Jakub Kicinski

net: ipa: update copyrights

2022-10-03T23:49:20+00:00

Some source files state copyright dates that are earlier than the last modification of the file. Change the copyright year to 2022 in all such cases. Signed-off-by: Alex Elder Link: https://lore.kernel.org/r/20220930224549.3503434-1-elder@linaro.org Signed-off-by: Jakub Kicinski