kernel/linux.git/drivers/net/ipa/ipa_mem.c, branch v6.19.11

net: ipa: Make the SMEM item ID constant

2025-05-13T22:42:50+00:00

It can't vary, stop storing the same magic number everywhere. Signed-off-by: Konrad Dybcio Reviewed-by: Alex Elder Link: https://patch.msgid.link/20250512-topic-ipa_smem-v1-1-302679514a0d@oss.qualcomm.com Signed-off-by: Jakub Kicinski

net: ipa: sort all includes

2024-04-18T11:01:05+00:00

Establish the rule that header files are always included in sorted (POSIX local) order. Standard and private headers are separated by a blank line. Similarly, sort all forward-declarations for structures. Signed-off-by: Alex Elder Signed-off-by: Paolo Abeni

net: ipa: remove unneeded standard includes

2024-04-18T11:01:05+00:00

Some IPA header files include one or more other standard header files despite not directly needing anything defined in the included files. Remove these unnecessary includes. Signed-off-by: Alex Elder Signed-off-by: Paolo Abeni

net: ipa: don't save the platform device

2024-03-04T11:44:41+00:00

The IPA platform device is now only used as the structure containing the IPA device structure. Replace the platform device pointer with a pointer to the device structure. Signed-off-by: Alex Elder Signed-off-by: David S. Miller

net: ipa: pass a platform device to ipa_mem_init()

2024-03-04T11:44:40+00:00

Rather than using the platform device pointer field in the IPA pointer, pass a platform device pointer to ipa_mem_init(). Use that pointer throughout that function. Signed-off-by: Alex Elder Signed-off-by: David S. Miller

net: ipa: prepare for IPA v5.5

2023-11-24T12:18:55+00:00

For IPA v5.5+, the QTIME_TIMESTAMP_CFG register no longer defines two fields in the DPL timestamp. Make the code referencing those fields in ipa_qtime_config() conditional based on IPA version. IPA v5.0+ supports the IPA_MEM_AP_V4_FILTER and IPA_MEM_AP_V6_FILTER memory regions. Update ipa_mem_id_valid() to reflect that. IPA v5.5 no longer supports a few register fields, adds some others, and removes support for a few IPA interrupt types. Update "ipa_reg.h" to include information about IPA v5.5. Signed-off-by: Alex Elder Signed-off-by: David S. Miller

Merge tag 'iommu-updates-v6.3' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu

2023-02-24T21:40:13+00:00

Pull iommu updates from Joerg Roedel: - Consolidate iommu_map/unmap functions. There have been blocking and atomic variants so far, but that was problematic as this approach does not scale with required new variants which just differ in the GFP flags used. So Jason consolidated this back into single functions that take a GFP parameter. - Retire the detach_dev() call-back in iommu_ops - Arm SMMU updates from Will: - Device-tree binding updates: - Cater for three power domains on SM6375 - Document existing compatible strings for Qualcomm SoCs - Tighten up clocks description for platform-specific compatible strings - Enable Qualcomm workarounds for some additional platforms that need them - Intel VT-d updates from Lu Baolu: - Add Intel IOMMU performance monitoring support - Set No Execute Enable bit in PASID table entry - Two performance optimizations - Fix PASID directory pointer coherency - Fix missed rollbacks in error path - Cleanups - Apple t8110 DART support - Exynos IOMMU: - Implement better fault handling - Error handling fixes - Renesas IPMMU: - Add device tree bindings for r8a779g0 - AMD IOMMU: - Various fixes for handling on SNP-enabled systems and handling of faults with unknown request-ids - Cleanups and other small fixes - Various other smaller fixes and cleanups * tag 'iommu-updates-v6.3' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu: (71 commits) iommu/amd: Skip attach device domain is same as new domain iommu: Attach device group to old domain in error path iommu/vt-d: Allow to use flush-queue when first level is default iommu/vt-d: Fix PASID directory pointer coherency iommu/vt-d: Avoid superfluous IOTLB tracking in lazy mode iommu/vt-d: Fix error handling in sva enable/disable paths iommu/amd: Improve page fault error reporting iommu/amd: Do not identity map v2 capable device when snp is enabled iommu: Fix error unwind in iommu_group_alloc() iommu/of: mark an unused function as __maybe_unused iommu: dart: DART_T8110_ERROR range should be 0 to 5 iommu/vt-d: Enable IOMMU perfmon support iommu/vt-d: Add IOMMU perfmon overflow handler support iommu/vt-d: Support cpumask for IOMMU perfmon iommu/vt-d: Add IOMMU perfmon support iommu/vt-d: Support Enhanced Command Interface iommu/vt-d: Retrieve IOMMU perfmon capability information iommu/vt-d: Support size of the register set in DRHD iommu/vt-d: Set No Execute Enable bit in PASID table entry iommu/vt-d: Remove sva from intel_svm_dev ...

net: ipa: generalize register field functions

2023-02-10T08:06:32+00:00

Rename functions related to register fields so they don't appear to be IPA-specific, and move their definitions into "reg.h": ipa_reg_fmask() -> reg_fmask() ipa_reg_bit() -> reg_bit() ipa_reg_field_max() -> reg_field_max() ipa_reg_encode() -> reg_encode() ipa_reg_decode() -> reg_decode() Signed-off-by: Alex Elder Signed-off-by: David S. Miller

net: ipa: generalize register offset functions

2023-02-10T08:06:32+00:00

Rename ipa_reg_offset() to be reg_offset() and move its definition to "reg.h". Rename ipa_reg_n_offset() to be reg_n_offset() also. Signed-off-by: Alex Elder Signed-off-by: David S. Miller

net: ipa: start generalizing "ipa_reg"

2023-02-10T08:06:32+00:00

IPA register definitions have evolved with each new version. The changes required to support more than 32 endpoints in IPA v5.0 made it best to define a unified mechanism for defining registers and their fields. GSI register definitions, meanwhile, have remained fairly stable. And even as the total number of IPA endpoints goes beyond 32, the number of GSI channels on a given EE that underly endpoints still remains 32 or less. Despite that, GSI v3.0 (which is used with IPA v5.0) extends the number of channels (and events) it supports to be about 256, and as a result, many GSI register definitions must change significantly. To address this, we'll use the same "ipa_reg" mechanism to define the GSI registers. As a first step in generalizing the "ipa_reg" to also support GSI registers, isolate the definitions of the "ipa_reg" and "ipa_regs" structure types (and some supporting macros) into a new header file, and remove the "ipa_" and "IPA_" from symbol names. Separate the IPA register ID validity checking from the generic check that a register ID is in range. Aside from that, this is intended to have no functional effect on the code. Signed-off-by: Alex Elder Signed-off-by: David S. Miller