kernel/linux.git/drivers/mtd/devices, branch v4.11.5

Merge branch 'for-linus' of git://git.armlinux.org.uk/~rmk/linux-arm

2017-02-28T19:50:53+00:00

Pull ARM updates from Russell King: - nommu updates from Afzal Mohammed cleaning up the vectors support - allow DMA memory "mapping" for nommu Benjamin Gaignard - fixing a correctness issue with R_ARM_PREL31 relocations in the module linker - add strlen() prototype for the decompressor - support for DEBUG_VIRTUAL from Florian Fainelli - adjusting memory bounds after memory reservations have been registered - unipher cache handling updates from Masahiro Yamada - initrd and Thumb Kconfig cleanups * 'for-linus' of git://git.armlinux.org.uk/~rmk/linux-arm: (23 commits) ARM: mm: round the initrd reservation to page boundaries ARM: mm: clean up initrd initialisation ARM: mm: move initrd init code out of arm_memblock_init() ARM: 8655/1: improve NOMMU definition of pgprot_*() ARM: 8654/1: decompressor: add strlen prototype ARM: 8652/1: cache-uniphier: clean up active way setup code ARM: 8651/1: cache-uniphier: include instead of ARM: 8650/1: module: handle negative R_ARM_PREL31 addends correctly ARM: 8649/2: nommu: remove Hivecs configuration is asm ARM: 8648/2: nommu: display vectors base ARM: 8647/2: nommu: dynamic exception base address setting ARM: 8646/1: mmu: decouple VECTORS_BASE from Kconfig ARM: 8644/1: Reduce "CPU: shutdown" message to debug level ARM: 8641/1: treewide: Replace uses of virt_to_phys with __pa_symbol ARM: 8640/1: Add support for CONFIG_DEBUG_VIRTUAL ARM: 8639/1: Define KERNEL_START and KERNEL_END ARM: 8638/1: mtd: lart: Rename partition defines to be prefixed with PART_ ARM: 8637/1: Adjust memory boundaries after reservations ARM: 8636/1: Cleanup sanity_check_meminfo ARM: add CPU_THUMB_CAPABLE to indicate possible Thumb support ...

ARM: 8638/1: mtd: lart: Rename partition defines to be prefixed with PART_

2017-02-28T11:05:46+00:00

In preparation for defining KERNEL_START on ARM, rename KERNEL_START to PART_KERNEL_START, and to be consistent, do this for all partition-related constants. Acked-by: Boris Brezillon Signed-off-by: Florian Fainelli Signed-off-by: Russell King

Merge tag 'spi-nor/for-4.11-v2' of git://github.com/spi-nor/linux

2017-02-10T18:05:51+00:00

From Cyrille: """ This pull request contains the following notable changes: - add support to the 4-byte address instruction set. - add support to new memory parts. - add support to S3AN memories. - add support to the Intel SPI controller. - add support to the Aspeed AST2400 and AST2550 controllers. - fix max SPI transfer and message sizes in m25p80_read(). - fix the Candence QSPI driver. - fix the Freescale QSPI driver. """

mtd: spi-nor: add dt support for Everspin MRAMs

2017-02-10T13:21:59+00:00

The MR25 family doesn't support JEDEC, so they need explicit mentioning in the list of supported spi IDs. This makes it possible to add these using for example: compatible = "everspin,mr25h40"; There was already an entry for mr25h256. Move that one out of the "keep for compatibility" section and put in a new group for Everspin MRAMs. Signed-off-by: Uwe Kleine-König Acked-by: Rob Herring Signed-off-by: Cyrille Pitchen

mtd: spi-nor: rename SPINOR_OP_* macros of the 4-byte address op codes

2017-02-10T12:55:03+00:00

This patch renames the SPINOR_OP_* macros of the 4-byte address instruction set so the new names all share a common pattern: the 4-byte address name is built from the 3-byte address name appending the "_4B" suffix. The patch also introduces new op codes to support other SPI protocols such as SPI 1-4-4 and SPI 1-2-2. This is a transitional patch and will help a later patch of spi-nor.c to automate the translation from the 3-byte address op codes into their 4-byte address version. Signed-off-by: Cyrille Pitchen Acked-by: Mark Brown Acked-by: Marek Vasut

mtd: m25p80: consider max message size in m25p80_read

2017-02-10T12:54:55+00:00

Consider a message size limit when calculating the maximum amount of data that can be read. The message size limit has been introduced with 4.9, so cc it to stable. Signed-off-by: Heiner Kallweit Signed-off-by: Cyrille Pitchen

mtd: bcm47xxsflash: support reading flash out of mapping window

2017-02-08T23:07:59+00:00

For reading flash content we use MMIO but it's possible to read only first 16 MiB this way. It's simply an arch design/limitation. To support flash sizes bigger than 16 MiB implement indirect access using ChipCommon registers. This has been tested using MX25L25635F. Signed-off-by: Rafał Miłecki Acked-by: Marek Vasut Signed-off-by: Brian Norris

mtd: bcm47xxsflash: use platform_(set|get)_drvdata

2017-02-08T19:19:43+00:00

We have generic place & helpers for storing platform driver data so there is no reason for using custom priv pointer. This allows cleaning up struct bcma_sflash from unneeded fields. Signed-off-by: Rafał Miłecki Acked-by: Kalle Valo Acked-by: Boris Brezillon Signed-off-by: Brian Norris

Replace with globally

2016-12-24T19:46:01+00:00

This was entirely automated, using the script by Al: PATT='^[[:blank:]]*#[[:blank:]]*include[[:blank:]]*' sed -i -e "s!$PATT!#include !" \ $(git grep -l "$PATT"|grep -v ^include/linux/uaccess.h) to do the replacement at the end of the merge window. Requested-by: Al Viro Signed-off-by: Linus Torvalds

mtd: bcm47xxsflash: use uncached MMIO access for BCM53573

2016-11-08T02:17:37+00:00

BCM53573 is a new series of Broadcom's SoCs. It's based on ARM and uses this old ChipCommon-based flash access. Early tests resulted in flash corruptions that were tracked down to using cached MMIO for flash read access. Switch to ioremap_nocache conditionally to support BCM53573 and don't break performance on old MIPS devices. Signed-off-by: Rafał Miłecki Reviewed-by: Boris Brezillon Signed-off-by: Brian Norris