kernel/linux.git/drivers/misc/pci_endpoint_test.c, branch linux-7.0.y

misc: pci_endpoint_test: Add BAR subrange mapping test case

2026-01-29T23:42:29+00:00

Add a new PCITEST_BAR_SUBRANGE ioctl to exercise EPC BAR subrange mapping end-to-end. The test programs a simple 2-subrange layout on the endpoint (via pci-epf-test) and verifies that: - the endpoint-provided per-subrange signature bytes are observed at the expected PCIe BAR offsets, and - writes to each subrange are routed to the correct backing region (i.e. the submap order is applied rather than accidentally working due to an identity mapping). Return -EOPNOTSUPP when the endpoint does not advertise subrange mapping, -ENODATA when the BAR is disabled, and -EBUSY when the BAR is reserved for the test register space. Signed-off-by: Koichiro Den Signed-off-by: Manivannan Sadhasivam Signed-off-by: Bjorn Helgaas Link: https://patch.msgid.link/20260124145012.2794108-8-den@valinux.co.jp

misc: pci_endpoint_test: Cleanup extra 0 initialization

2025-08-27T13:09:32+00:00

Initialization is not needed as memory is already set to 0 by devm_kzalloc. Signed-off-by: Christian Bruel [mani: reworded description] Signed-off-by: Manivannan Sadhasivam Link: https://patch.msgid.link/20250804170916.3212221-3-christian.bruel@foss.st.com

misc: pci_endpoint_test: Skip IRQ tests if irq is out of range

2025-08-27T13:09:06+00:00

The pci_endpoint_test tests the 32-bit MSI range. However, the device might not have all vectors configured. For example, if msi_interrupts is 8 in the ep function space or if the MSI Multiple Message Capable value is configured as 4 (maximum 16 vectors). In this case, do not attempt to run the test to avoid timeouts and directly return the error value. Signed-off-by: Christian Bruel Signed-off-by: Manivannan Sadhasivam Link: https://patch.msgid.link/20250804170916.3212221-2-christian.bruel@foss.st.com

misc: pci_endpoint_test: Fix array underflow in pci_endpoint_test_ioctl()

2025-08-13T21:25:04+00:00

Commit eefb83790a0d ("misc: pci_endpoint_test: Add doorbell test case") added NO_BAR (-1) to the pci_barno enum which, in practical terms, changes the enum from an unsigned int to a signed int. If the user passes a negative number in pci_endpoint_test_ioctl() then it results in an array underflow in pci_endpoint_test_bar(). Fixes: eefb83790a0d ("misc: pci_endpoint_test: Add doorbell test case") Signed-off-by: Dan Carpenter Signed-off-by: Manivannan Sadhasivam Signed-off-by: Bjorn Helgaas Link: https://patch.msgid.link/aIzzZ4vc6ZrmM9rI@suswa

misc: pci_endpoint_test: Add doorbell test case

2025-07-24T21:51:46+00:00

Add doorbell support with the help of three new registers: PCIE_ENDPOINT_TEST_DB_BAR, PCIE_ENDPOINT_TEST_DB_ADDR, and PCIE_ENDPOINT_TEST_DB_DATA. The testcase works by triggering the doorbell in Endpoint by writing the value from PCI_ENDPOINT_TEST_DB_DATA register to the address provided by PCI_ENDPOINT_TEST_DB_OFFSET register of the BAR indicated by the PCIE_ENDPOINT_TEST_DB_BAR register and waiting for the completion status from the Endpoint. Signed-off-by: Frank Li [mani: removed one spurious change and reworded the commit message] Signed-off-by: Manivannan Sadhasivam Signed-off-by: Bjorn Helgaas Tested-by: Niklas Cassel Link: https://patch.msgid.link/20250710-ep-msi-v21-7-57683fc7fb25@nxp.com

misc: pci_endpoint_test: Defer IRQ allocation until ioctl(PCITEST_SET_IRQTYPE)

2025-04-23T22:04:48+00:00

Commit a402006d48a9 ("misc: pci_endpoint_test: Remove global 'irq_type' and 'no_msi'") changed so that the default IRQ vector requested by pci_endpoint_test_probe() was no longer the module param 'irq_type', but instead test->irq_type. test->irq_type is by default IRQ_TYPE_UNDEFINED (until someone calls ioctl(PCITEST_SET_IRQTYPE)). However, the commit also changed so that after initializing test->irq_type to IRQ_TYPE_UNDEFINED, it also overrides it with driver_data->irq_type, if the PCI device and vendor ID provides driver_data. This causes a regression for PCI device and vendor IDs that do not provide driver_data, and the host side pci_endpoint_test_driver driver failed to probe on such platforms: pci-endpoint-test 0001:01:00.0: Invalid IRQ type selected pci-endpoint-test 0001:01:00.0: probe with driver pci-endpoint-test failed with error -22 Considering that the pci endpoint selftests and the old pcitest.sh always call ioctl(PCITEST_SET_IRQTYPE) before performing any test that requires IRQs, fix the regression by removing the allocation of IRQs in pci_endpoint_test_probe(). The IRQ allocation will occur when ioctl(PCITEST_SET_IRQTYPE) is called. A positive side effect of this is that even if the endpoint controller has issues with IRQs, the user can do still do all the tests/ioctls() that do not require working IRQs, e.g. PCITEST_BAR and PCITEST_BARS. This also means that we can remove the now unused irq_type from driver_data. The irq_type will always be the one configured by the user using ioctl(PCITEST_SET_IRQTYPE). (A user that does not know, or care which irq_type that is used, can use PCITEST_IRQ_TYPE_AUTO. This has superseded the need for a default irq_type in driver_data.) [bhelgaas: add probe failure details] Fixes: a402006d48a9c ("misc: pci_endpoint_test: Remove global 'irq_type' and 'no_msi'") Signed-off-by: Niklas Cassel Signed-off-by: Manivannan Sadhasivam Signed-off-by: Bjorn Helgaas Tested-by: Frank Li Reviewed-by: Manivannan Sadhasivam Reviewed-by: Frank Li Link: https://patch.msgid.link/20250416142825.336554-2-cassel@kernel.org

Merge branch 'pci/controller/dwc'

2025-03-27T18:14:49+00:00

- Move struct dwc_pcie_vsec_id to include/linux/pcie-dwc.h, where it can be shared by debugfs, perf, sysfs, etc (Manivannan Sadhasivam) - Add dw_pcie_find_vsec_capability() to locate Vendor Specific Extended Capabilities (Shradha Todi) - Add debugfs-based Silicon Debug, Error Injection, Statistical Counter support for DWC (Shradha Todi) - Add debugfs property to expose LTSSM status of DWC PCIe link (Hans Zhang) - Add Rockchip Vendor ID and Vendor Specific ID of RAS DES Capability so the DWC debugfs features work for Rockchip as well (Niklas Cassel) * pci/controller/dwc: PCI: dw-rockchip: Hide broken ATS capability for RK3588 running in EP mode PCI: dwc: ep: Add dw_pcie_ep_hide_ext_capability() PCI: dwc: ep: Return -ENOMEM for allocation failures PCI: dwc: Add Rockchip to the RAS DES allowed vendor list PCI: Add Rockchip Vendor ID PCI: dwc: Add debugfs property to provide LTSSM status of the PCIe link PCI: dwc: Add debugfs based Statistical Counter support for DWC PCI: dwc: Add debugfs based Error Injection support for DWC PCI: dwc: Add debugfs based Silicon Debug support for DWC PCI: dwc: Add helper to find the Vendor Specific Extended Capability (VSEC) perf/dwc_pcie: Move common DWC struct definitions to 'pcie-dwc.h'

misc: pci_endpoint_test: Add support for PCITEST_IRQ_TYPE_AUTO

2025-03-26T06:11:54+00:00

For PCITEST_MSI we really want to set PCITEST_SET_IRQTYPE explicitly to PCITEST_IRQ_TYPE_MSI, since we want to test if MSI works. For PCITEST_MSIX we really want to set PCITEST_SET_IRQTYPE explicitly to PCITEST_IRQ_TYPE_MSIX, since we want to test if MSI works. For PCITEST_LEGACY_IRQ we really want to set PCITEST_SET_IRQTYPE explicitly to PCITEST_IRQ_TYPE_INTX, since we want to test if INTx works. However, for PCITEST_WRITE, PCITEST_READ, PCITEST_COPY, we really don't care which IRQ type that is used, we just want to use a IRQ type that is supported by the EPC. The old behavior was to always use MSI for PCITEST_WRITE, PCITEST_READ, PCITEST_COPY, was to always set IRQ type to MSI before doing the actual test, however, there are EPC drivers that do not support MSI. Add a new PCITEST_IRQ_TYPE_AUTO, that will use the CAPS register to see which IRQ types the endpoint supports, and use one of the supported IRQ types. For backwards compatibility, if the endpoint does not expose any supported IRQ type in the CAPS register, simply fallback to using MSI, as it was unconditionally done before. Signed-off-by: Niklas Cassel Signed-off-by: Krzysztof Wilczyński Link: https://lore.kernel.org/r/20250310111016.859445-16-cassel@kernel.org

misc: pci_endpoint_test: Use IRQ_TYPE_* defines from UAPI header

2025-03-14T16:12:04+00:00

Use the IRQ_TYPE_* defines from the UAPI header rather than duplicating these defines in the driver itself. No functional change. Signed-off-by: Niklas Cassel Signed-off-by: Krzysztof Wilczyński Link: https://lore.kernel.org/r/20250310111016.859445-11-cassel@kernel.org

misc: pci_endpoint_test: Do not use managed IRQ functions

2025-03-14T16:12:04+00:00

The pci_endpoint_test_request_irq() and pci_endpoint_test_release_irq() are called repeatedly by the users through pci_endpoint_test_set_irq(). So using the managed version of IRQ functions within these functions has no effect. Suggested-by: Manivannan Sadhasivam Reviewed-by: Manivannan Sadhasivam Signed-off-by: Kunihiko Hayashi Acked-by: Arnd Bergmann Link: https://lore.kernel.org/r/20250225110252.28866-7-hayashi.kunihiko@socionext.com Signed-off-by: Krzysztof Wilczyński