kernel/linux.git/drivers/misc/hpilo.h, branch v6.6.132

misc: hpilo: map iLO shared memory by PCI revision id

2021-06-04T13:28:23+00:00

Starting from iLO ASIC 'Neches' with subsystem device id 0x00E4, bar 5 is used for shared memory region mapping instead of bar 2 because bar 2 is made inaccessible after system POST for security reason. As this holds true for future iLO ASIC generations, it does not make sense to map shared memory region according to the subsystem device id of each following generations. Map iLO shared memory region with PCI revision id that maps to the iLO ASIC generation, starting from Neches (Rev 7). Signed-off-by: Matt Hsiao Link: https://lore.kernel.org/r/20210531085551.26421-1-matt.hsiao@hpe.com Signed-off-by: Greg Kroah-Hartman

hpilo: Replace one-element array with flexible-array member

2020-07-14T16:21:25+00:00

There is a regular need in the kernel to provide a way to declare having a dynamically sized set of trailing elements in a structure. Kernel code should always use “flexible array members”[1] for these cases. The older style of one-element or zero-length arrays should no longer be used[2]. For this particular case, it is important to notice that the cachelines change from 7 to 6 after the flexible-array conversion: $ pahole -C 'fifo' drivers/misc/hpilo.o struct fifo { u64 nrents; /* 0 8 */ u64 imask; /* 8 8 */ u64 merge; /* 16 8 */ u64 reset; /* 24 8 */ u8 pad_0[96]; /* 32 96 */ /* --- cacheline 2 boundary (128 bytes) --- */ u64 head; /* 128 8 */ u8 pad_1[120]; /* 136 120 */ /* --- cacheline 4 boundary (256 bytes) --- */ u64 tail; /* 256 8 */ u8 pad_2[120]; /* 264 120 */ /* --- cacheline 6 boundary (384 bytes) --- */ u64 fifobar[1]; /* 384 8 */ /* size: 392, cachelines: 7, members: 10 */ /* last cacheline: 8 bytes */ }; $ pahole -C 'fifo' drivers/misc/hpilo.o struct fifo { u64 nrents; /* 0 8 */ u64 imask; /* 8 8 */ u64 merge; /* 16 8 */ u64 reset; /* 24 8 */ u8 pad_0[96]; /* 32 96 */ /* --- cacheline 2 boundary (128 bytes) --- */ u64 head; /* 128 8 */ u8 pad_1[120]; /* 136 120 */ /* --- cacheline 4 boundary (256 bytes) --- */ u64 tail; /* 256 8 */ u8 pad_2[120]; /* 264 120 */ /* --- cacheline 6 boundary (384 bytes) --- */ u64 fifobar[]; /* 384 0 */ /* size: 384, cachelines: 6, members: 10 */ }; Lastly, remove unnecessary parentheses in fifo_sz() and fix the following checkpatch.pl warning for the whole fifo structure: WARNING: please, no spaces at the start of a line [1] https://en.wikipedia.org/wiki/Flexible_array_member [2] https://github.com/KSPP/linux/issues/79 Tested-by: kernel test robot Link: https://github.com/GustavoARSilva/linux-hardening/blob/master/cii/kernel-ci/hpilo-20200714.md Signed-off-by: Gustavo A. R. Silva Link: https://lore.kernel.org/r/20200714154449.GA26153@embeddedor Signed-off-by: Greg Kroah-Hartman

misc: Use the correct style for SPDX License Identifier

2019-10-10T13:34:40+00:00

This patch corrects the SPDX License Identifier style in header files for Miscellaneous device drivers. For C header files Documentation/process/license-rules.rst mandates C-like comments (opposed to C source files where C++ style should be used) Changes made by using a script provided by Joe Perches here: https://lkml.org/lkml/2019/2/7/46. Suggested-by: Joe Perches Signed-off-by: Nishad Kamdar Link: https://lore.kernel.org/r/20190920155931.GA6251@nishad Signed-off-by: Greg Kroah-Hartman

misc: hpilo: Use SPDX-License-Identifier

2017-12-07T17:45:31+00:00

SPDX-License-Identifier is used for the hpilo. Signed-off-by: Dhaval Shah Signed-off-by: Greg Kroah-Hartman

misc: hpilo: increase number of max supported channels

2012-06-15T00:22:12+00:00

Increase number of supported channels from 8 to 24. Make the number of channels configurable via module parameter max_ccb. Signed-off-by: Mark Rusk Signed-off-by: Tony Camuso Signed-off-by: Greg Kroah-Hartman

hpilo: fix pointer warning in ilo_ccb_setup

2010-08-10T03:45:05+00:00

Fix i386 PAE compile warning: drivers/misc/hpilo.c: In function `ilo_ccb_setup': drivers/misc/hpilo.c:274: warning: cast to pointer from integer of different size dma_addr_t is 64 on i386 PAE which causes a size mismatch. Signed-off-by: Prarit Bhargava Acked-by: David Altobelli Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds

hpilo: add locking comment

2009-12-11T19:24:51+00:00

Add explanation about lock nesting and purpose of each lock in hpilo. Signed-off-by: David Altobelli Signed-off-by: Andrew Morton Signed-off-by: Greg Kroah-Hartman

hpilo: add interrupt handler

2009-09-15T16:50:48+00:00

Add interrupt handler to hpilo. This is enablement for poll handler, and it also simplifies the logic for handling an iLO reset, because now only the interrupt handler needs to look for reset, the file system interfaces only need to return failure when a reset has happened. Signed-off-by: David Altobelli Signed-off-by: Greg Kroah-Hartman

hpilo: reduce frequency of IO operations

2009-04-01T15:59:18+00:00

Change hpilo open and close logic to spin for 10usec between checking device, rather than every usec. Because the loop is coded to take up to 10ms, it seemed prudent to increase the interval between polling the device, to reduce the load on the system and allow more other work to happen. Signed-off-by: David Altobelli Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds

hpilo: open/close fix

2009-02-05T20:56:46+00:00

The device can take a while to respond to an open/close request, so increase the time kernel will wait for response (1 ms to 10ms). Also, properly clean up a channel on a failed open, by calling the channel close routine. Just freeing the memory isn't sufficient, the device needs to be informed that the channel is no longer open, and the device memory cleared of references to freed dma buffer. Signed-off-by: David Altobelli Cc: Greg KH Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds