<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/linux.git/drivers/misc/cxl/context.c, branch v5.4.232</title>
<subtitle>Linux kernel stable tree (mirror)</subtitle>
<id>https://git.radix-linux.su/kernel/linux.git/atom?h=v5.4.232</id>
<link rel='self' href='https://git.radix-linux.su/kernel/linux.git/atom?h=v5.4.232'/>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/'/>
<updated>2019-05-30T18:26:32+00:00</updated>
<entry>
<title>treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 152</title>
<updated>2019-05-30T18:26:32+00:00</updated>
<author>
<name>Thomas Gleixner</name>
<email>tglx@linutronix.de</email>
</author>
<published>2019-05-27T06:55:01+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=2874c5fd284268364ece81a7bd936f3c8168e567'/>
<id>urn:sha1:2874c5fd284268364ece81a7bd936f3c8168e567</id>
<content type='text'>
Based on 1 normalized pattern(s):

  this program is free software you can redistribute it and or modify
  it under the terms of the gnu general public license as published by
  the free software foundation either version 2 of the license or at
  your option any later version

extracted by the scancode license scanner the SPDX license identifier

  GPL-2.0-or-later

has been chosen to replace the boilerplate/reference in 3029 file(s).

Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Reviewed-by: Allison Randal &lt;allison@lohutok.net&gt;
Cc: linux-spdx@vger.kernel.org
Link: https://lkml.kernel.org/r/20190527070032.746973796@linutronix.de
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>cxl: Remove abandonned capi support for the Mellanox CX4, final cleanup</title>
<updated>2018-07-02T13:54:33+00:00</updated>
<author>
<name>Frederic Barrat</name>
<email>fbarrat@linux.ibm.com</email>
</author>
<published>2018-06-28T10:05:09+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=f3988ca4c74e136e49487b51231d324d0c923495'/>
<id>urn:sha1:f3988ca4c74e136e49487b51231d324d0c923495</id>
<content type='text'>
Remove a few XSL/CX4 oddities which are no longer needed. A simple
revert of the initial commits was not possible (or not worth it) due
to the history of the code.

Signed-off-by: Frederic Barrat &lt;fbarrat@linux.ibm.com&gt;
Acked-by: Andrew Donnellan &lt;andrew.donnellan@au1.ibm.com&gt;
Signed-off-by: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
</content>
</entry>
<entry>
<title>Revert "cxl: Add preliminary workaround for CX4 interrupt limitation"</title>
<updated>2018-07-02T13:54:31+00:00</updated>
<author>
<name>Alastair D'Silva</name>
<email>alastair@d-silva.org</email>
</author>
<published>2018-06-28T10:05:02+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=17d29039388807305ab02a4d6eae7cbe09f81f90'/>
<id>urn:sha1:17d29039388807305ab02a4d6eae7cbe09f81f90</id>
<content type='text'>
Remove abandonned capi support for the Mellanox CX4.

This reverts commit cbce0917e2e47d4bf5aa3b5fd6b1247f33e1a126.

Signed-off-by: Alastair D'Silva &lt;alastair@d-silva.org&gt;
Acked-by: Andrew Donnellan &lt;andrew.donnellan@au1.ibm.com&gt;
Signed-off-by: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
</content>
</entry>
<entry>
<title>misc: cxl: Change return type to vm_fault_t</title>
<updated>2018-04-23T11:31:27+00:00</updated>
<author>
<name>Souptick Joarder</name>
<email>jrdr.linux@gmail.com</email>
</author>
<published>2018-04-17T14:53:54+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=a5a0b45eda75c6f12cf871ac6c365007a1f330ff'/>
<id>urn:sha1:a5a0b45eda75c6f12cf871ac6c365007a1f330ff</id>
<content type='text'>
Use new return type vm_fault_t for fault handler. For
now, this is just documenting that the function returns
a VM_FAULT value rather than an errno. Once all instances
are converted, vm_fault_t will become a distinct type.

Reference id -&gt; 1c8f422059ae ("mm: change return type to
vm_fault_t")

previously cxl_mmap_fault returns VM_FAULT_NOPAGE as
default value irrespective of vm_insert_pfn() return
value. This bug is fixed with new vmf_insert_pfn()
which will return VM_FAULT_ type based on err.

Signed-off-by: Souptick Joarder &lt;jrdr.linux@gmail.com&gt;
Acked-by: Andrew Donnellan &lt;andrew.donnellan@au1.ibm.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>cxl: Add support for ASB_Notify on POWER9</title>
<updated>2018-01-19T12:19:37+00:00</updated>
<author>
<name>Christophe Lombard</name>
<email>clombard@linux.vnet.ibm.com</email>
</author>
<published>2018-01-11T08:55:25+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=b1db551324f72fa14ad82ca31237a7ed418104df'/>
<id>urn:sha1:b1db551324f72fa14ad82ca31237a7ed418104df</id>
<content type='text'>
The POWER9 core supports a new feature: ASB_Notify which requires the
support of the Special Purpose Register: TIDR.

The ASB_Notify command, generated by the AFU, will attempt to
wake-up the host thread identified by the particular LPID:PID:TID.

This patch assign a unique TIDR (thread id) for the current thread which
will be used in the process element entry.

Signed-off-by: Christophe Lombard &lt;clombard@linux.vnet.ibm.com&gt;
Reviewed-by: Philippe Bergheaud &lt;felix@linux.vnet.ibm.com&gt;
Acked-by: Frederic Barrat &lt;fbarrat@linux.vnet.ibm.com&gt;
Reviewed-by: Vaibhav Jain &lt;vaibhav@linux.vnet.ibm.com&gt;
Acked-by: Andrew Donnellan &lt;andrew.donnellan@au1.ibm.com&gt;
Signed-off-by: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
</content>
</entry>
<entry>
<title>cxl: Enable global TLBIs for cxl contexts</title>
<updated>2017-09-28T07:09:16+00:00</updated>
<author>
<name>Frederic Barrat</name>
<email>fbarrat@linux.vnet.ibm.com</email>
</author>
<published>2017-09-03T18:15:13+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=03b8abedf4f4965e7e9e0d4f92877c42c07ce19f'/>
<id>urn:sha1:03b8abedf4f4965e7e9e0d4f92877c42c07ce19f</id>
<content type='text'>
The PSL and nMMU need to see all TLB invalidations for the memory
contexts used on the adapter. For the hash memory model, it is done by
making all TLBIs global as soon as the cxl driver is in use. For
radix, we need something similar, but we can refine and only convert
to global the invalidations for contexts actually used by the device.

The new mm_context_add_copro() API increments the 'active_cpus' count
for the contexts attached to the cxl adapter. As soon as there's more
than 1 active cpu, the TLBIs for the context become global. Active cpu
count must be decremented when detaching to restore locality if
possible and to avoid overflowing the counter.

The hash memory model support is somewhat limited, as we can't
decrement the active cpus count when mm_context_remove_copro() is
called, because we can't flush the TLB for a mm on hash. So TLBIs
remain global on hash.

Signed-off-by: Frederic Barrat &lt;fbarrat@linux.vnet.ibm.com&gt;
Fixes: f24be42aab37 ("cxl: Add psl9 specific code")
Tested-by: Alistair Popple &lt;alistair@popple.id.au&gt;
[mpe: Fold in updated comment on the barrier from Fred]
Signed-off-by: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
</content>
</entry>
<entry>
<title>cxl: Fixes for Coherent Accelerator Interface Architecture 2.0</title>
<updated>2017-06-23T06:26:23+00:00</updated>
<author>
<name>Christophe Lombard</name>
<email>clombard@linux.vnet.ibm.com</email>
</author>
<published>2017-06-13T15:41:05+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=797625deaedd9a0621376817db2813244b3246e3'/>
<id>urn:sha1:797625deaedd9a0621376817db2813244b3246e3</id>
<content type='text'>
A previous set of patches "cxl: Add support for Coherent Accelerator
Interface Architecture 2.0" has introduced a new support for the CAPI
cards. These patches have been tested on Simulation environment and
quite a bit of them have been tested on real hardware.

This patch brings new fixes after a series of tests carried out on new
equipment:
  - Add POWER9 definition.
  - Re-enable any masked interrupts when the AFU is not activated
    after resetting the AFU.
  - Remove the api cxl_is_psl8/9 which is no longer useful.
  - Do not dump CAPI1 registers.
  - Rewrite cxl_is_page_fault() function.
  - Do not register slb callack on P9.

Fixes: f24be42aab37 ("cxl: Add psl9 specific code")
Signed-off-by: Christophe Lombard &lt;clombard@linux.vnet.ibm.com&gt;
Acked-by: Frederic Barrat &lt;fbarrat@linux.vnet.ibm.com&gt;
Signed-off-by: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
</content>
</entry>
<entry>
<title>cxl: Add psl9 specific code</title>
<updated>2017-04-13T13:34:31+00:00</updated>
<author>
<name>Christophe Lombard</name>
<email>clombard@linux.vnet.ibm.com</email>
</author>
<published>2017-04-12T14:34:07+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=f24be42aab37c6d07c05126673138e06223a6399'/>
<id>urn:sha1:f24be42aab37c6d07c05126673138e06223a6399</id>
<content type='text'>
The new Coherent Accelerator Interface Architecture, level 2, for the
IBM POWER9 brings new content and features:
- POWER9 Service Layer
- Registers
- Radix mode
- Process element entry
- Dedicated-Shared Process Programming Model
- Translation Fault Handling
- CAPP
- Memory Context ID
    If a valid mm_struct is found the memory context id is used for each
    transaction associated with the process handle. The PSL uses the
    context ID to find the corresponding process element.

Signed-off-by: Christophe Lombard &lt;clombard@linux.vnet.ibm.com&gt;
Acked-by: Frederic Barrat &lt;fbarrat@linux.vnet.ibm.com&gt;
[mpe: Fixup comment formatting, unsplit long strings]
Signed-off-by: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
</content>
</entry>
<entry>
<title>cxl: Isolate few psl8 specific calls</title>
<updated>2017-04-13T13:34:30+00:00</updated>
<author>
<name>Christophe Lombard</name>
<email>clombard@linux.vnet.ibm.com</email>
</author>
<published>2017-04-07T14:11:58+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=abd1d99bb3da42d6c7341c14986f5b8f4dcc6bd5'/>
<id>urn:sha1:abd1d99bb3da42d6c7341c14986f5b8f4dcc6bd5</id>
<content type='text'>
Point out the specific Coherent Accelerator Interface Architecture,
level 1, registers.
Code and functions specific to PSL8 (CAIA1) must be framed.

Signed-off-by: Christophe Lombard &lt;clombard@linux.vnet.ibm.com&gt;
Acked-by: Frederic Barrat &lt;fbarrat@linux.vnet.ibm.com&gt;
[mpe: Don't split long strings, it makes them hard to grep for]
Signed-off-by: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
</content>
</entry>
<entry>
<title>cxl: Keep track of mm struct associated with a context</title>
<updated>2017-04-13T13:34:29+00:00</updated>
<author>
<name>Christophe Lombard</name>
<email>clombard@linux.vnet.ibm.com</email>
</author>
<published>2017-04-07T14:11:55+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=6dd2d23403396d8e6d153a6c9db56e1a1012bad8'/>
<id>urn:sha1:6dd2d23403396d8e6d153a6c9db56e1a1012bad8</id>
<content type='text'>
The mm_struct corresponding to the current task is acquired each time
an interrupt is raised. So to simplify the code, we only get the
mm_struct when attaching an AFU context to the process.
The mm_count reference is increased to ensure that the mm_struct can't
be freed. The mm_struct will be released when the context is detached.
A reference on mm_users is not kept to avoid a circular dependency if
the process mmaps its cxl mmio and forget to unmap before exiting.
The field glpid (pid of the group leader associated with the pid), of
the structure cxl_context, is removed because it's no longer useful.

Signed-off-by: Christophe Lombard &lt;clombard@linux.vnet.ibm.com&gt;
Reviewed-by: Andrew Donnellan &lt;andrew.donnellan@au1.ibm.com&gt;
Acked-by: Frederic Barrat &lt;fbarrat@linux.vnet.ibm.com&gt;
Signed-off-by: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
</content>
</entry>
</feed>
