<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/linux.git/drivers/mfd/lpc_ich.c, branch linux-7.0.y</title>
<subtitle>Linux kernel stable tree (mirror)</subtitle>
<id>https://git.radix-linux.su/kernel/linux.git/atom?h=linux-7.0.y</id>
<link rel='self' href='https://git.radix-linux.su/kernel/linux.git/atom?h=linux-7.0.y'/>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/'/>
<updated>2024-12-17T13:17:25+00:00</updated>
<entry>
<title>mfd: lpc_ich: Add another Gemini Lake ISA bridge PCI device-id</title>
<updated>2024-12-17T13:17:25+00:00</updated>
<author>
<name>Hans de Goede</name>
<email>hdegoede@redhat.com</email>
</author>
<published>2024-11-14T19:38:08+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=1e89d21f8189d286f80b900e1b7cf57cb1f3037e'/>
<id>urn:sha1:1e89d21f8189d286f80b900e1b7cf57cb1f3037e</id>
<content type='text'>
On N4100 / N4120 Gemini Lake SoCs the ISA bridge PCI device-id is 31e8
rather the 3197 found on e.g. the N4000 / N4020.

While at fix the existing GLK PCI-id table entry breaking the table
being sorted by device-id.

Signed-off-by: Hans de Goede &lt;hdegoede@redhat.com&gt;
Reviewed-by: Andy Shevchenko &lt;andy@kernel.org&gt;
Link: https://lore.kernel.org/r/20241114193808.110132-1-hdegoede@redhat.com
Signed-off-by: Lee Jones &lt;lee@kernel.org&gt;
</content>
</entry>
<entry>
<title>mfd: lpc_ich: Use ALIGN_DOWN() to obtain the start of the SPI base range</title>
<updated>2024-02-23T14:58:00+00:00</updated>
<author>
<name>Ilpo Järvinen</name>
<email>ilpo.jarvinen@linux.intel.com</email>
</author>
<published>2023-12-29T14:50:59+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=fc99c0132210a0f8b6a601eda90cf4d5e25b041d'/>
<id>urn:sha1:fc99c0132210a0f8b6a601eda90cf4d5e25b041d</id>
<content type='text'>
Instead of open coding, use ALIGN_DOWN() for alignment.

Signed-off-by: Ilpo Järvinen &lt;ilpo.jarvinen@linux.intel.com&gt;
Link: https://lore.kernel.org/r/20231229145059.6138-1-ilpo.jarvinen@linux.intel.com
Signed-off-by: Lee Jones &lt;lee@kernel.org&gt;
</content>
</entry>
<entry>
<title>mfd: lpc_ich: Mark *_gpio_offsets data with const</title>
<updated>2023-11-01T10:02:18+00:00</updated>
<author>
<name>Andy Shevchenko</name>
<email>andriy.shevchenko@linux.intel.com</email>
</author>
<published>2023-10-24T16:06:50+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=2b481822446e30943fb7c02744a7b49ebec0e696'/>
<id>urn:sha1:2b481822446e30943fb7c02744a7b49ebec0e696</id>
<content type='text'>
There is no reason why the GPIO resource offsets should not be const.
Mark them accordingly and update a qualifier in struct lpc_ich_gpio_info
definition.

Signed-off-by: Andy Shevchenko &lt;andriy.shevchenko@linux.intel.com&gt;
Link: https://lore.kernel.org/r/20231024160650.3898959-1-andriy.shevchenko@linux.intel.com
Signed-off-by: Lee Jones &lt;lee@kernel.org&gt;
</content>
</entry>
<entry>
<title>mfd: lpc_ich: Add a platform device for pinctrl Denverton</title>
<updated>2023-11-01T10:02:13+00:00</updated>
<author>
<name>Andy Shevchenko</name>
<email>andriy.shevchenko@linux.intel.com</email>
</author>
<published>2023-09-26T19:08:34+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=b4e40505f90a9936e7dd2dd0b98a1af97d8941f0'/>
<id>urn:sha1:b4e40505f90a9936e7dd2dd0b98a1af97d8941f0</id>
<content type='text'>
This is to cater the need in non-ACPI system whereby a platform device
has to be created in order to bind with the Denverton pinctrl driver.

Signed-off-by: Andy Shevchenko &lt;andriy.shevchenko@linux.intel.com&gt;
Link: https://lore.kernel.org/r/20230926190834.932233-4-andriy.shevchenko@linux.intel.com
Signed-off-by: Lee Jones &lt;lee@kernel.org&gt;
</content>
</entry>
<entry>
<title>mfd: lpc_ich: Move APL GPIO resources to a custom structure</title>
<updated>2023-11-01T10:02:13+00:00</updated>
<author>
<name>Andy Shevchenko</name>
<email>andriy.shevchenko@linux.intel.com</email>
</author>
<published>2023-09-26T19:08:33+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=1f84f88dc15036d63fa7c84833a440370f22a74b'/>
<id>urn:sha1:1f84f88dc15036d63fa7c84833a440370f22a74b</id>
<content type='text'>
We are expecting more platforms that want to instantiate
the GPIO device via P2SB. For them prepare the custom structure
and move Apollo Lake data there. Refactor the code accordingly.

Signed-off-by: Andy Shevchenko &lt;andriy.shevchenko@linux.intel.com&gt;
Link: https://lore.kernel.org/r/20230926190834.932233-3-andriy.shevchenko@linux.intel.com
Signed-off-by: Lee Jones &lt;lee@kernel.org&gt;
</content>
</entry>
<entry>
<title>mfd: lpc_ich: Make struct lpc_ich_priv use enum for chipset member</title>
<updated>2023-11-01T10:02:13+00:00</updated>
<author>
<name>Andy Shevchenko</name>
<email>andriy.shevchenko@linux.intel.com</email>
</author>
<published>2023-09-26T19:08:31+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=b0eb61880f004290a62b71b135825e9c5f5bde99'/>
<id>urn:sha1:b0eb61880f004290a62b71b135825e9c5f5bde99</id>
<content type='text'>
We have a specific enum for the supported chipsets.
Make struct lpc_ich_priv use better type for the chipset member.

Signed-off-by: Andy Shevchenko &lt;andriy.shevchenko@linux.intel.com&gt;
Link: https://lore.kernel.org/r/20230926190834.932233-1-andriy.shevchenko@linux.intel.com
Signed-off-by: Lee Jones &lt;lee@kernel.org&gt;
</content>
</entry>
<entry>
<title>mfd: Move from strlcpy with unused retval to strscpy</title>
<updated>2022-09-28T15:17:39+00:00</updated>
<author>
<name>Wolfram Sang</name>
<email>wsa+renesas@sang-engineering.com</email>
</author>
<published>2022-08-18T21:00:29+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=6a32d3995f7bcf04598548778da54d2b6932b6a5'/>
<id>urn:sha1:6a32d3995f7bcf04598548778da54d2b6932b6a5</id>
<content type='text'>
Follow the advice of the below link and prefer 'strscpy' in this
subsystem. Conversion is 1:1 because the return value is not used.
Generated by a coccinelle script.

Link: https://lore.kernel.org/r/CAHk-=wgfRnXz0W3D37d01q3JFkr_i_uTL=V6A6G1oUZcprmknw@mail.gmail.com/
Signed-off-by: Wolfram Sang &lt;wsa+renesas@sang-engineering.com&gt;
Signed-off-by: Lee Jones &lt;lee@kernel.org&gt;
Link: https://lore.kernel.org/r/20220818210030.7012-1-wsa+renesas@sang-engineering.com
</content>
</entry>
<entry>
<title>mfd: lpc_ich: Add support for pinctrl in non-ACPI system</title>
<updated>2022-07-14T09:50:31+00:00</updated>
<author>
<name>Tan Jui Nee</name>
<email>jui.nee.tan@intel.com</email>
</author>
<published>2022-06-06T16:41:31+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=7064d7d88b83b6394ee833e805fd041c615acb13'/>
<id>urn:sha1:7064d7d88b83b6394ee833e805fd041c615acb13</id>
<content type='text'>
Add support for non-ACPI systems, such as system that uses
Advanced Boot Loader (ABL) whereby a platform device has to be created
in order to bind with pin control and GPIO.

At the moment, Intel Apollo Lake In-Vehicle Infotainment (IVI) system
requires a driver to hide and unhide P2SB to lookup P2SB BAR and pass
the PCI BAR address to GPIO.

Signed-off-by: Tan Jui Nee &lt;jui.nee.tan@intel.com&gt;
Co-developed-by: Andy Shevchenko &lt;andriy.shevchenko@linux.intel.com&gt;
Signed-off-by: Andy Shevchenko &lt;andriy.shevchenko@linux.intel.com&gt;
Tested-by: Henning Schild &lt;henning.schild@siemens.com&gt;
Acked-by: Hans de Goede &lt;hdegoede@redhat.com&gt;
Acked-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
Signed-off-by: Lee Jones &lt;lee@kernel.org&gt;
</content>
</entry>
<entry>
<title>mfd: lpc_ich: Switch to generic p2sb_bar()</title>
<updated>2022-07-14T09:50:25+00:00</updated>
<author>
<name>Andy Shevchenko</name>
<email>andriy.shevchenko@linux.intel.com</email>
</author>
<published>2022-06-06T16:41:30+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=559793198f9280cdd56c438f5258e315ed8a6cbc'/>
<id>urn:sha1:559793198f9280cdd56c438f5258e315ed8a6cbc</id>
<content type='text'>
Instead of open coding p2sb_bar() functionality we are going to
use generic library. There is one more user en route.

This is more than just a clean-up. It also fixes a potential issue
seen when SPI BAR is 64-bit. The current code works if and only if
the PCI BAR of the hidden device is inside 4G address space. In case
when firmware decides to go above 4G, we will get a wrong address.

Signed-off-by: Andy Shevchenko &lt;andriy.shevchenko@linux.intel.com&gt;
Tested-by: Henning Schild &lt;henning.schild@siemens.com&gt;
Acked-by: Hans de Goede &lt;hdegoede@redhat.com&gt;
Acked-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
Signed-off-by: Lee Jones &lt;lee@kernel.org&gt;
</content>
</entry>
<entry>
<title>mfd: lpc_ich: Factor out lpc_ich_enable_spi_write()</title>
<updated>2022-07-14T09:50:14+00:00</updated>
<author>
<name>Andy Shevchenko</name>
<email>andriy.shevchenko@linux.intel.com</email>
</author>
<published>2022-06-06T16:41:29+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=6e3b29dbc119fa86bc25f822e8c6166552086531'/>
<id>urn:sha1:6e3b29dbc119fa86bc25f822e8c6166552086531</id>
<content type='text'>
Factor out duplicate code to lpc_ich_enable_spi_write() helper function.

Signed-off-by: Andy Shevchenko &lt;andriy.shevchenko@linux.intel.com&gt;
Tested-by: Henning Schild &lt;henning.schild@siemens.com&gt;
Acked-by: Hans de Goede &lt;hdegoede@redhat.com&gt;
Acked-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
Signed-off-by: Lee Jones &lt;lee@kernel.org&gt;
</content>
</entry>
</feed>
