kernel/linux.git/drivers/memory/tegra/tegra264.c, branch v7.2-rc5

memory: tegra264: drop redundant tegra264_mc_icc_aggregate()

2026-06-09T15:00:30+00:00

tegra264_mc_icc_aggregate() does nothing on top of icc_std_aggregate except an early return on !mc->bwmgr_mrq_supported. tegra264_mc_icc_set() already returns early on the same condition, before reading any of the aggregated avg_bw / peak_bw values. This makes the early return in aggregate() redundant. So, set tegra264_mc_icc_ops.aggregate to icc_std_aggregate and drop the helper. Reported-by: Jon Hunter Signed-off-by: Sumit Gupta Reviewed-by: Jon Hunter Tested-by: Jon Hunter Link: https://patch.msgid.link/20260527140127.49172-3-sumitg@nvidia.com Signed-off-by: Krzysztof Kozlowski

memory: tegra264: Add full set of MC clients

2026-05-27T12:50:19+00:00

Extend the tegra264_mc_clients table to cover the full set of memory clients exposed by the SoC. The client name is used for MC fault reporting. Clients managed by the BPMP bandwidth manager additionally carry their bpmp_id and type. Entries in tegra264_mc_clients[] are sorted to match the order of the override and security register offsets used in previous SoCs. Signed-off-by: Sumit Gupta Link: https://patch.msgid.link/20260518124306.2071481-4-sumitg@nvidia.com Signed-off-by: Krzysztof Kozlowski

memory: tegra264: Skip clients without bpmp_id or type

2026-05-27T12:50:17+00:00

Some MC clients are present in tegra264_mc_clients[] only for fault-log naming and have no .bpmp_id or .type assigned. Skip forwarding bandwidth requests to BPMP for such clients in tegra264_mc_icc_set(). Signed-off-by: Sumit Gupta Link: https://patch.msgid.link/20260518124306.2071481-2-sumitg@nvidia.com Signed-off-by: Krzysztof Kozlowski

memory: tegra: Add MC error logging support for Tegra264

2026-03-07T17:02:48+00:00

In Tegra264, different components from memory subsystems like Memory Controller Fabric (MCF), HUB, HUB Common (HUBC), Side Band Shim (SBS) and channels have different interrupt lines for receiving memory controller error interrupts. Add support for logging memory controller errors reported by these memory subsystems on Tegra264 by: - Renaming tegra_mc_error_names array to tegra20_mc_error_names because it has a different bit index for error names compared to Tegra264. - Defining the intmask registers and mask values supported for Tegra264. - Registering interrupt handlers for interrupts associated with these different MC components which read the interrupt status registers to determine the type of violation that occurred. Signed-off-by: Ketan Patil Reviewed-by: Jon Hunter Tested-by: Jon Hunter Link: https://patch.msgid.link/20260226163115.1152181-7-ketanp@nvidia.com Signed-off-by: Krzysztof Kozlowski

memory: tegra: Prepare for supporting multiple intmask registers

2026-03-07T17:02:41+00:00

Add a new structure for the intmask register e.g. MC_INTMASK_0 and it's mask value. Add an array of these new structures to prepare for supporting multiple intmask registers. This is done in preparation for adding support for Tegra264 which supports multiple intmask registers. Signed-off-by: Ketan Patil Reviewed-by: Jon Hunter Tested-by: Jon Hunter Link: https://patch.msgid.link/20260226163115.1152181-6-ketanp@nvidia.com [krzk: Fix checkpatch warning] Signed-off-by: Krzysztof Kozlowski

memory: tegra: Add Tegra264 MC and EMC support

2025-07-11T14:49:42+00:00

Add support to enable Memory Controller (MC) and External Memory Controller (EMC) drivers for Tegra264. The nodes for MC and EMC are mostly the same as Tegra234 but differ in number of channels and interrupt numbers. The patch also adds the bandwidth manager definitions required for Tegra264 and uses them to populate the memory client table. All of these are needed to properly enable memory interconnect (ICC) support. Signed-off-by: Sumit Gupta Acked-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20250709222147.3758356-3-thierry.reding@gmail.com Signed-off-by: Thierry Reding