kernel/linux.git/drivers/mailbox/Kconfig, branch v6.1.168

mailbox: mediatek: add support for adsp mailbox controller

2022-03-13T01:24:57+00:00

This patch is to for MediaTek ADSP IPC mailbox controller driver It is used to send short messages between processors with adsp Signed-off-by: Allen-KH Cheng Reviewed-by: Tzung-Bi Shih Reviewed-by: YC Hung Reviewed-by: AngeloGioacchino Del Regno Signed-off-by: Jassi Brar

mailbox: apple: Add driver for Apple mailboxes

2021-10-30T03:34:31+00:00

Apple SoCs such as the M1 come with various co-processors. Mailboxes are used to communicate with those. This driver adds support for two variants of those mailboxes. Signed-off-by: Sven Peter Signed-off-by: Jassi Brar

mailbox: qcom-ipcc: Enable loading QCOM_IPCC as a module

2021-08-30T04:50:15+00:00

This patch enables the qcom_ipcc driver to be loaded as a module. IPCC is fairly core to system, so as such it should never be unloaded. It registers as a mailbox + irq controller and the irq controller drivers in kernel are not supposed to be unloaded as they don't have the visibility over the clients consuming the irqs. Hence adding supress_bind_attrs to disable bind/unbind via sysfs. Signed-off-by: Amit Pundir Reviewed-by: Manivannan Sadhasivam Signed-off-by: Jassi Brar

mbox: add polarfire soc system controller mailbox

2021-06-26T17:06:48+00:00

This driver adds support for the single mailbox channel of the MSS system controller on the Microchip PolarFire SoC. Signed-off-by: Conor Dooley Signed-off-by: Jassi Brar

mailbox: fix various typos in comments

2021-04-14T01:07:35+00:00

Fix trivial typos in mailbox driver comments. s/Intergrated/Integrated/ s/extenstion/extension/ s/atleast/at least/ s/commnunication/communication/ s/assgined/assigned/ s/commnunication/communication/ s/recevied/received/ s/succeded/succeeded/ s/implmentation/implementation/ s/definiation/definition/ s/traget/target/ s/wont/won't/ Cc: trivial@kernel.org Signed-off-by: Tom Saeger Reviewed-by: Randy Dunlap Signed-off-by: Jassi Brar

mailbox: arm_mhuv2: Add driver

2020-12-10T01:26:02+00:00

This adds driver for the ARM MHUv2 (Message Handling Unit) mailbox controller. This is based on the accepted DT bindings of the controller and supports combination of both transport protocols, i.e. doorbell and data-transfer. Transmitting and receiving data through the mailbox framework is done through struct arm_mhuv2_mbox_msg. Based on the initial work done by Morten Borup Petersen from ARM. Co-developed-by: Tushar Khandelwal Signed-off-by: Tushar Khandelwal Tested-by: Usama Arif Signed-off-by: Viresh Kumar Signed-off-by: Jassi Brar

mailbox: stm32-ipcc: add COMPILE_TEST dependency

2020-12-02T01:17:20+00:00

This allows compiling the driver on architectures where the hardware is not available. Most other mailbox drivers support this as well. Signed-off-by: Martin Kaiser Reviewed-by: Fabien Dessenne Signed-off-by: Jassi Brar

mailbox: Add support for Qualcomm IPCC

2020-05-30T23:43:23+00:00

Add support for the Inter-Processor Communication Controller (IPCC) block from Qualcomm that coordinates the interrupts (inbound & outbound) for Multiprocessor (MPROC), COMPUTE-Level0 (COMPUTE-L0) & COMPUTE-Level1 (COMPUTE-L1) protocols for the Application Processor Subsystem (APSS). This driver is modeled as an irqchip+mailbox driver. The irqchip part helps in receiving the interrupts from the IPCC clients such as modems, DSPs, PCI-E etc... and forwards them to respective entities in APSS. On the other hand, the mailbox part is used to send interrupts to the IPCC clients from the entities of APSS. Reviewed-by: Bjorn Andersson Signed-off-by: Raghavendra Rao Ananta Signed-off-by: Venkata Narendra Kumar Gutta Signed-off-by: Bjorn Andersson [mani: moved to mailbox, added static mbox channels and cleanups] Signed-off-by: Manivannan Sadhasivam Signed-off-by: Jassi Brar

mailbox: sprd: Add Spreadtrum mailbox driver

2020-05-30T23:05:33+00:00

The Spreadtrum mailbox controller supports 8 channels to communicate with MCUs, and it contains 2 different parts: inbox and outbox, which are used to send and receive messages by IRQ mode. Signed-off-by: Baolin Wang Signed-off-by: Jassi Brar

mailbox: sun6i-msgbox: Add a new mailbox driver

2020-03-20T04:00:32+00:00

Allwinner sun6i, sun8i, sun9i, and sun50i SoCs contain a hardware message box used for communication between the ARM CPUs and the ARISC management coprocessor. This mailbox contains 8 unidirectional 4-message FIFOs. Add a driver for it, so it can be used with the Linux mailbox framework. Reviewed-by: Philipp Zabel Signed-off-by: Samuel Holland Signed-off-by: Jassi Brar