kernel/linux.git/drivers/mailbox/Kconfig, branch v4.14.217

mailbox: Introduce Qualcomm APCS IPC driver

2017-06-14T12:17:19+00:00

This implements a driver that exposes the IPC bits found in the APCS Global block in various Qualcomm platforms. The bits are used to signal inter-processor communication signals from the application CPU to other masters. Signed-off-by: Bjorn Andersson Signed-off-by: Jassi Brar

mailbox: Remove depends on COMPILE_TEST for BCM_FLEXRM_MBOX

2017-03-29T05:38:30+00:00

The Broadcom FlexRM mailbox driver uses platform MSI support but not all ARCHs provide asm/msi.h. Due to this, we get compilation error in Broadcom FlexRM mailbox driver via linux/msi.h on ARCHs which lack asm/msi.h. This patch removes "depends on COMPILE_TEST" for Kconfig option BCM_FLEXRM_MBOX so that Broadcom FlexRM mailbox driver is only compiled for ARM64. Signed-off-by: Anup Patel Signed-off-by: Jassi Brar

mailbox: Add driver for Broadcom FlexRM ring manager

2017-03-28T18:03:30+00:00

Some of the Broadcom iProc SoCs have FlexRM ring manager which provides a ring-based programming interface to various offload engines (e.g. RAID, Crypto, etc). This patch adds a common mailbox driver for Broadcom FlexRM ring manager which can be shared by various offload engine drivers (implemented as mailbox clients). Reviewed-by: Ray Jui Reviewed-by: Scott Branden Reviewed-by: Pramod KUMAR Signed-off-by: Anup Patel Signed-off-by: Jassi Brar

mailbox: bcm-pdc: Add Northstar Plus support to PDC driver

2017-03-28T17:57:56+00:00

Adds support for Northstar Plus (NS+) products to the PDC mailbox driver. The PDC driver was originally written to support the PDC ring manager in the Northstar2 (64-bit) device. The NS+ (32 bit device) uses an almost identical ring manager, though with a different name. We just need to check for the type of hardware in use, in order to write the appropriate interrupt configuration register. Also updated DMA width to be correct for both NS+ and NS2. Tested on NS+ and NS2. Signed-off-by: Steve Lin Acked-by: Jon Mason Signed-off-by: Jassi Brar

mailbox: Add Tegra HSP driver

2016-11-18T13:26:13+00:00

This driver exposes a mailbox interface for interprocessor communication using the Hardware Synchronization Primitives (HSP) module's doorbell mechanism. There are multiple HSP instances and they provide additional features such as shared mailboxes, shared and arbitrated semaphores. A driver for a remote processor can use the mailbox client provided by the HSP driver and build an IPC protocol on top of this synchronization mechanism. Based on work by Joseph Lo . Acked-by: Jassi Brar Signed-off-by: Thierry Reding

mailbox: Add Platform Message-Handling-Unit variant driver

2016-09-07T07:37:17+00:00

Add Message-Handling-Unit driver for platform variants as mailbox controller. Actually, only the Amlogic Meson GXBB SoC MHU is supported. Signed-off-by: Neil Armstrong Signed-off-by: Jassi Brar

mailbox: Add HAS_DMA Kconfig dependency to BCM_PDC_MBOX

2016-08-29T13:09:46+00:00

Add HAS_DMA Kconfig dependency to BCM_PDC_MBOX to avoid link error on some platforms. Reported-by: Fengguang Wu Signed-off-by: Rob Rice Acked-by: Geert Uytterhoeven Signed-off-by: Jassi Brar

mailbox: Add Broadcom PDC mailbox driver

2016-07-28T04:04:47+00:00

The Broadcom PDC mailbox driver is a mailbox controller that manages data transfers to and from one or more offload engines. Signed-off-by: Rob Rice Reviewed-by: Scott Branden Reviewed-by: Ray Jui Signed-off-by: Jassi Brar

mailbox: Introduce TI message manager driver

2016-03-21T15:03:15+00:00

Support for TI Message Manager Module. This hardware block manages a bunch of hardware queues meant for communication between processor entities. Clients sitting on top of this would manage the required protocol for communicating with the counterpart entities. For more details on TI Message Manager hardware block, see documentation that will is available here: http://www.ti.com/lit/ug/spruhy8/spruhy8.pdf Chapter 8.1(Message Manager) Signed-off-by: Nishanth Menon Signed-off-by: Jassi Brar

mailbox: rockchip: Add Rockchip mailbox driver

2016-03-11T03:40:06+00:00

This driver is found on RK3368 SoCs. The Mailbox module is a simple APB peripheral that allows both the Cortex-A53 MCU system to communicate by writing operation to generate interrupt. The registers are accessible by both CPU via APB interface. The Mailbox has the following main features: 1) Support dual-core system: Cortex-A53 and MCU. 2) Support APB interface. 3) Support four mailbox elements, each element includes one data word, one command word register and one flag bit that can represent one interrupt. 4) Four interrupts to Cortex-A53. 5) Four interrupts to MCU. 6) Provide 32 lock registers for software to use to indicate whether mailbox is occupied. [Jassi: Removed unused variable buf_base] Signed-off-by: Caesar Wang Signed-off-by: Jassi Brar