kernel/linux.git/drivers/interconnect/qcom, branch v7.2-rc1

Merge branch 'icc-misc' into icc-next

2026-05-22T07:41:01+00:00

* icc-misc interconnect: Do not create empty devres on missing interconnects interconnect: Move MODULE_DEVICE_TABLE next to the table itself dt-bindings: interconnect: qcom,sdm660: Disallow clocks when appropriate dt-bindings: interconnect: qcom,sm6115: Drop incorrect children if:then: block dt-bindings: interconnect: qcom,sm6115: Restrict children and clocks interconnect: qcom: Fix indentation interconnect: qcom: Restrict drivers per ARM/ARM64 Signed-off-by: Georgi Djakov

Merge branch 'icc-hawi' into icc-next

2026-05-21T19:52:10+00:00

Add interconnect bindings and RPMh-based interconnect driver support for the upcoming Qualcomm Hawi SoC. * icc-hawi dt-bindings: interconnect: qcom-bwmon: Add Hawi cpu-bwmon compatible dt-bindings: interconnect: qcom-bwmon: Add Hawi llcc-bwmon compatible dt-bindings: interconnect: qcom: document the RPMh NoC for Hawi SoC interconnect: qcom: add Hawi interconnect provider driver Link: https://patch.msgid.link/20260506-icc-hawi-v4-0-35447fdc482b@oss.qualcomm.com Signed-off-by: Georgi Djakov

interconnect: qcom: add Hawi interconnect provider driver

2026-05-21T19:51:30+00:00

Add driver for the Qualcomm interconnect buses found in Hawi based platforms. The topology consists of several NoCs that are controlled by a remote processor that collects the aggregated bandwidth for each master-slave pair. Reviewed-by: Mike Tipton Reviewed-by: Konrad Dybcio Reviewed-by: Dmitry Baryshkov Acked-by: Krzysztof Kozlowski Signed-off-by: Vivek Aknurwar Link: https://patch.msgid.link/20260506-icc-hawi-v4-2-35447fdc482b@oss.qualcomm.com Signed-off-by: Georgi Djakov

Merge branch 'icc-eliza' into icc-next

2026-05-21T17:58:17+00:00

Add the missing Eliza SDCC1 interconnect slave ID and provider node. The Eliza interconnect binding and provider already describe SDCC2, but the matching SDCC1 CNOC CFG slave was left out. Add the binding constant and the provider node so consumers can describe SDCC1 bandwidth paths. The provider change also adds qhs_sdc1 to qsm_cfg and bcm_cn0, and updates the qsm_cfg link count and bcm_cn0 node count. * icc-eliza dt-bindings: interconnect: qcom,eliza-rpmh: Add SDCC1 slave interconnect: qcom: eliza: Add SDCC1 slave node Link: https://patch.msgid.link/20260514-eliza-interconnect-add-missing-sdcc1-slave-node-v2-0-13c03bc890cb@oss.qualcomm.com Signed-off-by: Georgi Djakov

Merge branch 'icc-nord' into icc-next

2026-05-21T17:57:37+00:00

This adds RPMh-based interconnect support for the Qualcomm Nord SoC. The Nord SoC features a rich Network-on-Chip topology comprising 19 NoCs including aggregate NoCs, a high-speed configuration NoC (HSCNOC), a multimedia NoC, four NSP data NoCs for AI/ML workloads, PCIe inbound and outbound NoCs, a system NoC, and virtual clock/MC nodes. Bandwidth requests are communicated to the RPMh hardware through Bus Clock Manager (BCM) resources via the Resource State Coordinator (RSC). * icc-nord dt-bindings: interconnect: Document RPMh Network-On-Chip for Qualcomm Nord SoC interconnect: qcom: Add interconnect provider driver for Nord SoC Link: https://patch.msgid.link/20260510020607.1129773-1-shengchao.guo@oss.qualcomm.com Signed-off-by: Georgi Djakov

interconnect: qcom: eliza: Add SDCC1 slave node

2026-05-15T07:21:19+00:00

The Eliza interconnect provider is missing the SDCC1 CNOC CFG slave node. Add qhs_sdc1 to the provider node table so SDCC1 interconnect paths can resolve to a provider node. Hook qhs_sdc1 up to qsm_cfg and CN0, and bump the corresponding qsm_cfg.num_links and bcm_cn0.num_nodes counts. Reviewed-by: Dmitry Baryshkov Signed-off-by: Abel Vesa Reviewed-by: Konrad Dybcio Link: https://patch.msgid.link/20260514-eliza-interconnect-add-missing-sdcc1-slave-node-v2-2-13c03bc890cb@oss.qualcomm.com Signed-off-by: Georgi Djakov

interconnect: qcom: Restrict drivers per ARM/ARM64

2026-05-10T10:18:48+00:00

There is no point to allow selecting core SoC drivers like interconnects for Qualcomm ARMv7 SoCs when building ARM64 kernel, and vice versa. This makes kernel configuration more difficult as many do not remember the Qualcomm SoCs model names/numbers and their properties like architecture. No features should be lost because: 1. There won't be a single image for ARMv7 and ARMv8/9 SoCs. 2. Newer ARMv8/9 SoCs won't be running in arm32 emulation mode. Signed-off-by: Krzysztof Kozlowski Reviewed-by: Konrad Dybcio Link: https://patch.msgid.link/20260428-interconnect-qcom-clean-arm64-v1-2-e6bc3f7832db@oss.qualcomm.com Signed-off-by: Georgi Djakov

interconnect: qcom: Fix indentation

2026-05-10T10:18:36+00:00

KConfig entries should be indented starting with one tab, so replace spaces with it. Signed-off-by: Krzysztof Kozlowski Link: https://patch.msgid.link/20260428-interconnect-qcom-clean-arm64-v1-1-e6bc3f7832db@oss.qualcomm.com Signed-off-by: Georgi Djakov

interconnect: Move MODULE_DEVICE_TABLE next to the table itself

2026-05-10T09:29:14+00:00

By convention MODULE_DEVICE_TABLE() immediately follows the ID table it exports, because this is easier to read and verify. It also makes more sense since #ifdef for ACPI or OF could hide both of them. Most of the privers already have this correctly placed, so adjust the missing ones. No functional impact. Signed-off-by: Krzysztof Kozlowski Reviewed-by: Dmitry Baryshkov Reviewed-by: Konrad Dybcio Link: https://patch.msgid.link/20260505102854.186925-2-krzysztof.kozlowski@oss.qualcomm.com Signed-off-by: Georgi Djakov

interconnect: qcom: Add interconnect provider driver for Nord SoC

2026-05-10T09:12:10+00:00

Add driver for the Qualcomm interconnect buses found on Nord SoC. The topology consists of several NoCs that are controlled by a remote processor that collects the aggregated bandwidth for each master-slave pair. Signed-off-by: Odelu Kukatla Reviewed-by: Konrad Dybcio Reviewed-by: Dmitry Baryshkov Signed-off-by: Shawn Guo Link: https://patch.msgid.link/20260510020607.1129773-3-shengchao.guo@oss.qualcomm.com Signed-off-by: Georgi Djakov