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<title>kernel/linux.git/drivers/gpu/nova-core/fsp/hal/gb100.rs, branch master</title>
<subtitle>Linux kernel stable tree (mirror)</subtitle>
<id>https://git.radix-linux.su/kernel/linux.git/atom?h=master</id>
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<updated>2026-06-03T20:10:51+00:00</updated>
<entry>
<title>gpu: nova-core: move lifetime to `Bar0`</title>
<updated>2026-06-03T20:10:51+00:00</updated>
<author>
<name>Gary Guo</name>
<email>gary@garyguo.net</email>
</author>
<published>2026-06-02T17:04:07+00:00</published>
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<id>urn:sha1:99676aed1fec109d62822e21a06760eb098dc5f4</id>
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Currently Nova code uses `&amp;'a Bar0` a lot. This is `&amp;'a Mmio`, where `Mmio`
represents an owned MMIO region; this type only exists as a target for
`Deref` so `Bar` and `IoMem` can share code and should be avoided to be
named directly. The upcoming I/O projection series would make `Io` trait
much simpler to implement, and thus the owned MMIO type would be removed
in favour of direct `Io` implementation on `Bar` and `IoMem`.

Add lifetime parameter to `Bar0&lt;'a&gt;` and change it to be alias of `&amp;'a
pci::Bar&lt;'a, ..&gt;`. This also prepares Nova core so that when I/O projection
series land, this could be changed to using a MMIO view type directly which
avoids double indirection.

Signed-off-by: Gary Guo &lt;gary@garyguo.net&gt;
Acked-by: Alexandre Courbot &lt;acourbot@nvidia.com&gt;
Reviewed-by: Eliot Courtney &lt;ecourtney@nvidia.com&gt;
Link: https://patch.msgid.link/20260602170416.2268531-1-gary@kernel.org
[ Rebase onto latest drm-rust-next (Blackwell enablement). - Danilo ]
Signed-off-by: Danilo Krummrich &lt;dakr@kernel.org&gt;
</content>
</entry>
<entry>
<title>gpu: nova-core: Hopper/Blackwell: select FSP Chain of Trust version</title>
<updated>2026-06-03T13:13:21+00:00</updated>
<author>
<name>John Hubbard</name>
<email>jhubbard@nvidia.com</email>
</author>
<published>2026-06-03T07:30:22+00:00</published>
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<id>urn:sha1:a355d8142f343cffd28ff0f97c251a0334d3c0b3</id>
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The FSP Chain of Trust handshake is versioned: Hopper speaks version 1
and Blackwell speaks version 2. Provide the version through the FSP HAL
so the boot message carries the value FSP expects, and so chipsets that
do not use FSP need not express a version at all.

Signed-off-by: John Hubbard &lt;jhubbard@nvidia.com&gt;
Reviewed-by: Eliot Courtney &lt;ecourtney@nvidia.com&gt;
Link: https://patch.msgid.link/20260603-b4-blackwell-v13-5-d9f3a06939e0@nvidia.com
Signed-off-by: Alexandre Courbot &lt;acourbot@nvidia.com&gt;
</content>
</entry>
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