<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/linux.git/drivers/gpu/nova-core/falcon.rs, branch linux-7.0.y</title>
<subtitle>Linux kernel stable tree (mirror)</subtitle>
<id>https://git.radix-linux.su/kernel/linux.git/atom?h=linux-7.0.y</id>
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<updated>2026-05-23T11:08:44+00:00</updated>
<entry>
<title>gpu: nova-core: falcon: rename load parameters to reflect DMA dependency</title>
<updated>2026-05-23T11:08:44+00:00</updated>
<author>
<name>Alexandre Courbot</name>
<email>acourbot@nvidia.com</email>
</author>
<published>2026-03-06T04:52:40+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=a8efb5d27c59c84890e3b32e668c319a45b9ff94'/>
<id>urn:sha1:a8efb5d27c59c84890e3b32e668c319a45b9ff94</id>
<content type='text'>
[ Upstream commit 8a623869b8269dbf52d52711cd7b9355044b6b53 ]

The current `FalconLoadParams` and `FalconLoadTarget` types are fit for
DMA loading, but not so much for PIO loading which will require its own
types. Start by renaming them to something that indicates that they are
indeed DMA-related.

Reviewed-by: Eliot Courtney &lt;ecourtney@nvidia.com&gt;
Acked-by: Danilo Krummrich &lt;dakr@kernel.org&gt;
Link: https://patch.msgid.link/20260306-turing_prep-v11-3-8f0042c5d026@nvidia.com
[acourbot@nvidia.com: fixup order of import items.]
Signed-off-by: Alexandre Courbot &lt;acourbot@nvidia.com&gt;
Stable-dep-of: 17d7c97f73c7 ("gpu: nova-core: firmware: fix and explain v2 header offsets computations")
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</content>
</entry>
<entry>
<title>gpu: nova-core: create falcon firmware DMA objects lazily</title>
<updated>2026-05-23T11:08:44+00:00</updated>
<author>
<name>Alexandre Courbot</name>
<email>acourbot@nvidia.com</email>
</author>
<published>2026-03-06T04:52:38+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=1303afda3439beebafdfc95e8ea9698d542174de'/>
<id>urn:sha1:1303afda3439beebafdfc95e8ea9698d542174de</id>
<content type='text'>
[ Upstream commit bc9de9e1af2f05461460e1b215a6d209ee62d65a ]

When DMA was the only loading option for falcon firmwares, we decided to
store them in DMA objects as soon as they were loaded from disk and
patch them in-place to avoid having to do an extra copy.

This decision complicates the PIO loading patch considerably, and
actually does not even stand on its own when put into perspective with
the fact that it requires 8 unsafe statements in the code that wouldn't
exist if we stored the firmware into a `KVVec` and copied it into a DMA
object at the last minute.

The cost of the copy is, as can be expected, imperceptible at runtime.
Thus, switch to a lazy DMA object creation model and simplify our code
a bit. This will also have the nice side-effect of being more fit for
PIO loading.

Reviewed-by: Eliot Courtney &lt;ecourtney@nvidia.com&gt;
Acked-by: Danilo Krummrich &lt;dakr@kernel.org&gt;
Link: https://patch.msgid.link/20260306-turing_prep-v11-1-8f0042c5d026@nvidia.com
[acourbot@nvidia.com: add TODO item to switch back to a coherent
allocation when it becomes convenient to do so.]
Signed-off-by: Alexandre Courbot &lt;acourbot@nvidia.com&gt;
Stable-dep-of: 17d7c97f73c7 ("gpu: nova-core: firmware: fix and explain v2 header offsets computations")
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</content>
</entry>
<entry>
<title>gpu: nova-core: add Falcon HAL method load_method()</title>
<updated>2026-01-24T01:48:59+00:00</updated>
<author>
<name>Timur Tabi</name>
<email>ttabi@nvidia.com</email>
</author>
<published>2026-01-22T22:28:44+00:00</published>
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<id>urn:sha1:ab2aad252fe21347674cf969a5e9d44d69e403bb</id>
<content type='text'>
Some GPUs do not support using DMA to transfer code/data from system
memory to Falcon memory, and instead must use programmed I/O (PIO).
Add a function to the Falcon HAL to indicate whether a given GPU's
Falcons support DMA for this purpose.

Signed-off-by: Timur Tabi &lt;ttabi@nvidia.com&gt;
Reviewed-by: Gary Guo &lt;gary@garyguo.net&gt;
Acked-by: Danilo Krummrich &lt;dakr@kernel.org&gt;
Link: https://patch.msgid.link/20260122222848.2555890-10-ttabi@nvidia.com
[acourbot@nvidia.com: add short code to call into the HAL.]
[acourbot@nvidia.com: make `dma_load` private as per feedback.]
Signed-off-by: Alexandre Courbot &lt;acourbot@nvidia.com&gt;
</content>
</entry>
<entry>
<title>gpu: nova-core: move some functions into the HAL</title>
<updated>2026-01-23T23:45:13+00:00</updated>
<author>
<name>Timur Tabi</name>
<email>ttabi@nvidia.com</email>
</author>
<published>2026-01-22T22:28:41+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=82ed3243219d160601fdb98742633bee7dc6f360'/>
<id>urn:sha1:82ed3243219d160601fdb98742633bee7dc6f360</id>
<content type='text'>
A few Falcon methods are actually GPU-specific, so move them
into the HAL.

Signed-off-by: Timur Tabi &lt;ttabi@nvidia.com&gt;
Reviewed-by: John Hubbard &lt;jhubbard@nvidia.com&gt;
Reviewed-by: Gary Guo &lt;gary@garyguo.net&gt;
Acked-by: Danilo Krummrich &lt;dakr@kernel.org&gt;
Link: https://patch.msgid.link/20260122222848.2555890-7-ttabi@nvidia.com
Signed-off-by: Alexandre Courbot &lt;acourbot@nvidia.com&gt;
</content>
</entry>
<entry>
<title>gpu: nova-core: add NV_PFALCON_FALCON_DMATRFCMD::with_falcon_mem()</title>
<updated>2026-01-23T23:45:13+00:00</updated>
<author>
<name>Timur Tabi</name>
<email>ttabi@nvidia.com</email>
</author>
<published>2026-01-22T22:28:40+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=f6507640b0cddfd90d398e3996321b1a735f98be'/>
<id>urn:sha1:f6507640b0cddfd90d398e3996321b1a735f98be</id>
<content type='text'>
The with_falcon_mem() method initializes the 'imem' and 'sec' fields of
the NV_PFALCON_FALCON_DMATRFCMD register based on the value of
the FalconMem type.

Signed-off-by: Timur Tabi &lt;ttabi@nvidia.com&gt;
Reviewed-by: John Hubbard &lt;jhubbard@nvidia.com&gt;
Reviewed-by: Gary Guo &lt;gary@garyguo.net&gt;
Acked-by: Danilo Krummrich &lt;dakr@kernel.org&gt;
Link: https://patch.msgid.link/20260122222848.2555890-6-ttabi@nvidia.com
Signed-off-by: Alexandre Courbot &lt;acourbot@nvidia.com&gt;
</content>
</entry>
<entry>
<title>gpu: nova-core: add ImemNonSecure section infrastructure</title>
<updated>2026-01-23T23:45:12+00:00</updated>
<author>
<name>Timur Tabi</name>
<email>ttabi@nvidia.com</email>
</author>
<published>2026-01-22T22:28:37+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=b72cb7bcc20c3a0d7fc29590a6e85de3dfbe9eff'/>
<id>urn:sha1:b72cb7bcc20c3a0d7fc29590a6e85de3dfbe9eff</id>
<content type='text'>
The GSP booter firmware in Turing and GA100 includes a third memory
section called ImemNonSecure, which is non-secure IMEM.  This section
must be loaded separately from DMEM and secure IMEM, but only if it
actually exists.

Signed-off-by: Timur Tabi &lt;ttabi@nvidia.com&gt;
Reviewed-by: John Hubbard &lt;jhubbard@nvidia.com&gt;
Reviewed-by: Gary Guo &lt;gary@garyguo.net&gt;
Acked-by: Danilo Krummrich &lt;dakr@kernel.org&gt;
Link: https://patch.msgid.link/20260122222848.2555890-3-ttabi@nvidia.com
[acourbot@nvidia.com: add `debug_assert`.]
Signed-off-by: Alexandre Courbot &lt;acourbot@nvidia.com&gt;
</content>
</entry>
<entry>
<title>gpu: nova-core: rename Imem to ImemSecure</title>
<updated>2026-01-23T22:58:59+00:00</updated>
<author>
<name>Timur Tabi</name>
<email>ttabi@nvidia.com</email>
</author>
<published>2026-01-22T22:28:36+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=0975002be52bd21196b868707ed1415cf1c45b98'/>
<id>urn:sha1:0975002be52bd21196b868707ed1415cf1c45b98</id>
<content type='text'>
Rename FalconMem::Imem to ImemSecure to indicate that it references
Secure Instruction Memory.  This change has no functional impact.

On Falcon cores, pages in instruction memory can be tagged as Secure
or Non-Secure.  For GA102 and later, only Secure is used, which is why
FalconMem::Imem seems appropriate.  However, Turing firmware images
can also contain non-secure sections, and so FalconMem needs to support
that.  By renaming Imem to ImemSec now, future patches for Turing support
will be simpler.

Nouveau uses the term "IMEM" to refer both to the Instruction Memory
block on Falcon cores as well as to the images of secure firmware
uploaded to part of IMEM.  OpenRM uses the terms "ImemSec" and "ImemNs"
instead, and uses "IMEM" just to refer to the physical memory device.

Renaming these terms allows us to align with OpenRM, avoid confusion
between IMEM and ImemSec, and makes future patches simpler.

Signed-off-by: Timur Tabi &lt;ttabi@nvidia.com&gt;
Reviewed-by: John Hubbard &lt;jhubbard@nvidia.com&gt;
Reviewed-by: Gary Guo &lt;gary@garyguo.net&gt;
Acked-by: Danilo Krummrich &lt;dakr@kernel.org&gt;
Link: https://patch.msgid.link/20260122222848.2555890-2-ttabi@nvidia.com
Signed-off-by: Alexandre Courbot &lt;acourbot@nvidia.com&gt;
</content>
</entry>
<entry>
<title>gpu: nova-core: add missing newlines to several print strings</title>
<updated>2026-01-12T13:44:06+00:00</updated>
<author>
<name>Timur Tabi</name>
<email>ttabi@nvidia.com</email>
</author>
<published>2026-01-07T20:16:47+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=654826aa4a8f25cf825ad9254f37e6cb5092098f'/>
<id>urn:sha1:654826aa4a8f25cf825ad9254f37e6cb5092098f</id>
<content type='text'>
Although the dev_xx!() macro calls do not technically require terminating
newlines for the format strings, they should be added anyway to maintain
consistency, both within Rust code and with the C versions.

Signed-off-by: Timur Tabi &lt;ttabi@nvidia.com&gt;
Reviewed-by: John Hubbard &lt;jhubbard@nvidia.com&gt;
Link: https://patch.msgid.link/20260107201647.2490140-2-ttabi@nvidia.com
Signed-off-by: Danilo Krummrich &lt;dakr@kernel.org&gt;
</content>
</entry>
<entry>
<title>gpu: nova-core: check for overflow to DMATRFBASE1</title>
<updated>2026-01-12T13:43:31+00:00</updated>
<author>
<name>Timur Tabi</name>
<email>ttabi@nvidia.com</email>
</author>
<published>2026-01-07T20:16:46+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=5cf76277cdec872aef9ff2e9008ae129bb303787'/>
<id>urn:sha1:5cf76277cdec872aef9ff2e9008ae129bb303787</id>
<content type='text'>
The NV_PFALCON_FALCON_DMATRFBASE/1 register pair supports DMA addresses
up to 49 bits only, but the write to DMATRFBASE1 could exceed that.
To mitigate, check first that the DMA address will fit.

Reviewed-by: John Hubbard &lt;jhubbard@nvidia.com&gt;
Reviewed-by: Joel Fernandes &lt;joelagnelf@nvidia.com&gt;
Fixes: 69f5cd67ce41 ("gpu: nova-core: add falcon register definitions and base code")
Signed-off-by: Timur Tabi &lt;ttabi@nvidia.com&gt;
Link: https://patch.msgid.link/20260107201647.2490140-1-ttabi@nvidia.com
[ Import ::kernel::dma::DmaMask. - Danilo ]
Signed-off-by: Danilo Krummrich &lt;dakr@kernel.org&gt;
</content>
</entry>
<entry>
<title>gpu: nova-core: falcon: Move dma_reset functionality into helper</title>
<updated>2025-11-15T11:08:49+00:00</updated>
<author>
<name>Joel Fernandes</name>
<email>joelagnelf@nvidia.com</email>
</author>
<published>2025-11-14T19:55:43+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=0f2c8e278e9c6219c080d1e016cd72b07d50e444'/>
<id>urn:sha1:0f2c8e278e9c6219c080d1e016cd72b07d50e444</id>
<content type='text'>
Move dma_reset so we can use it for the upcoming sequencer
functionality.

Reviewed-by: Lyude Paul &lt;lyude@redhat.com&gt;
Signed-off-by: Joel Fernandes &lt;joelagnelf@nvidia.com&gt;
Signed-off-by: Alexandre Courbot &lt;acourbot@nvidia.com&gt;
Message-ID: &lt;20251114195552.739371-5-joelagnelf@nvidia.com&gt;
</content>
</entry>
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