<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/linux.git/drivers/gpu/ipu-v3, branch v4.9.236</title>
<subtitle>Linux kernel stable tree (mirror)</subtitle>
<id>https://git.radix-linux.su/kernel/linux.git/atom?h=v4.9.236</id>
<link rel='self' href='https://git.radix-linux.su/kernel/linux.git/atom?h=v4.9.236'/>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/'/>
<updated>2020-08-21T09:02:09+00:00</updated>
<entry>
<title>gpu: ipu-v3: image-convert: Combine rotate/no-rotate irq handlers</title>
<updated>2020-08-21T09:02:09+00:00</updated>
<author>
<name>Steve Longerbeam</name>
<email>slongerbeam@gmail.com</email>
</author>
<published>2020-06-17T22:40:37+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=248a9ca0dd2eb21a6491bf223fe7b2a3274f4892'/>
<id>urn:sha1:248a9ca0dd2eb21a6491bf223fe7b2a3274f4892</id>
<content type='text'>
[ Upstream commit 0f6245f42ce9b7e4d20f2cda8d5f12b55a44d7d1 ]

Combine the rotate_irq() and norotate_irq() handlers into a single
eof_irq() handler.

Signed-off-by: Steve Longerbeam &lt;slongerbeam@gmail.com&gt;
Signed-off-by: Philipp Zabel &lt;p.zabel@pengutronix.de&gt;
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</content>
</entry>
<entry>
<title>gpu: ipu-v3: ipu-ic: Fix saturation bit offset in TPMEM</title>
<updated>2019-08-04T07:33:30+00:00</updated>
<author>
<name>Steve Longerbeam</name>
<email>slongerbeam@gmail.com</email>
</author>
<published>2019-05-22T01:03:13+00:00</published>
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<id>urn:sha1:027466fc638139a172bf1274d115be78c7bd9e37</id>
<content type='text'>
commit 3d1f62c686acdedf5ed9642b763f3808d6a47d1e upstream.

The saturation bit was being set at bit 9 in the second 32-bit word
of the TPMEM CSC. This isn't correct, the saturation bit is bit 42,
which is bit 10 of the second word.

Fixes: 1aa8ea0d2bd5d ("gpu: ipu-v3: Add Image Converter unit")

Signed-off-by: Steve Longerbeam &lt;slongerbeam@gmail.com&gt;
Reviewed-by: Philipp Zabel &lt;p.zabel@pengutronix.de&gt;
Cc: stable@vger.kernel.org
Signed-off-by: Philipp Zabel &lt;p.zabel@pengutronix.de&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;

</content>
</entry>
<entry>
<title>gpu: ipu-v3: dp: fix CSC handling</title>
<updated>2019-05-16T17:43:43+00:00</updated>
<author>
<name>Lucas Stach</name>
<email>l.stach@pengutronix.de</email>
</author>
<published>2019-04-12T15:59:40+00:00</published>
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<id>urn:sha1:952ef05cf67984f7b14b2e3372343bdf43ab8e8b</id>
<content type='text'>
[ Upstream commit d4fad0a426c6e26f48c9a7cdd21a7fe9c198d645 ]

Initialize the flow input colorspaces to unknown and reset to that value
when the channel gets disabled. This avoids the state getting mixed up
with a previous mode.

Also keep the CSC settings for the background flow intact when disabling
the foreground flow.

Root-caused-by: Jonathan Marek &lt;jonathan@marek.ca&gt;
Signed-off-by: Lucas Stach &lt;l.stach@pengutronix.de&gt;
Signed-off-by: Philipp Zabel &lt;p.zabel@pengutronix.de&gt;
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</content>
</entry>
<entry>
<title>gpu: ipu-v3: Fix CSI offsets for imx53</title>
<updated>2019-03-23T12:19:41+00:00</updated>
<author>
<name>Steve Longerbeam</name>
<email>slongerbeam@gmail.com</email>
</author>
<published>2018-10-17T00:31:40+00:00</published>
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<id>urn:sha1:06d73d17b05ba2942ebdfc99fb660df5c7cbba69</id>
<content type='text'>
[ Upstream commit bb867d219fda7fbaabea3314702474c4eac2b91d ]

The CSI offsets are wrong for both CSI0 and CSI1. They are at
physical address 0x1e030000 and 0x1e038000 respectively.

Fixes: 2ffd48f2e7 ("gpu: ipu-v3: Add Camera Sensor Interface unit")

Signed-off-by: Steve Longerbeam &lt;slongerbeam@gmail.com&gt;
Signed-off-by: Philipp Zabel &lt;p.zabel@pengutronix.de&gt;
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</content>
</entry>
<entry>
<title>gpu: ipu-v3: Fix i.MX51 CSI control registers offset</title>
<updated>2019-03-23T12:19:41+00:00</updated>
<author>
<name>Alexander Shiyan</name>
<email>shc_work@mail.ru</email>
</author>
<published>2018-12-20T08:06:38+00:00</published>
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<id>urn:sha1:70522827d6e1be2b86b4a990cdbb96b26f3103b5</id>
<content type='text'>
[ Upstream commit 2c0408dd0d8906b26fe8023889af7adf5e68b2c2 ]

The CSI0/CSI1 registers offset is at +0xe030000/+0xe038000 relative
to the control module registers on IPUv3EX.
This patch fixes wrong values for i.MX51 CSI0/CSI1.

Fixes: 2ffd48f2e7 ("gpu: ipu-v3: Add Camera Sensor Interface unit")

Signed-off-by: Alexander Shiyan &lt;shc_work@mail.ru&gt;
Signed-off-by: Philipp Zabel &lt;p.zabel@pengutronix.de&gt;
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</content>
</entry>
<entry>
<title>gpu: ipu-v3: image-convert: Prevent race between run and unprepare</title>
<updated>2019-02-12T18:44:51+00:00</updated>
<author>
<name>Steve Longerbeam</name>
<email>slongerbeam@gmail.com</email>
</author>
<published>2018-09-19T23:07:18+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=eef25b07bad1ed9bace5790c8f7a1e568778796a'/>
<id>urn:sha1:eef25b07bad1ed9bace5790c8f7a1e568778796a</id>
<content type='text'>
[ Upstream commit 819bec35c8c9706185498c9222bd244e0781ad35 ]

Prevent possible race by parallel threads between ipu_image_convert_run()
and ipu_image_convert_unprepare(). This involves setting ctx-&gt;aborting
to true unconditionally so that no new job runs can be queued during
unprepare, and holding the ctx-&gt;aborting flag until the context is freed.

Note that the "normal" ipu_image_convert_abort() case (e.g. not during
context unprepare) should clear the ctx-&gt;aborting flag after aborting
any active run and clearing the context's pending queue. This is because
it should be possible to continue to use the conversion context and queue
more runs after an abort.

Signed-off-by: Steve Longerbeam &lt;slongerbeam@gmail.com&gt;
Tested-by: Philipp Zabel &lt;p.zabel@pengutronix.de&gt;
Signed-off-by: Philipp Zabel &lt;p.zabel@pengutronix.de&gt;
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</content>
</entry>
<entry>
<title>gpu: ipu-v3: Fix CSI selection for VDIC</title>
<updated>2018-11-10T15:42:48+00:00</updated>
<author>
<name>Marek Vasut</name>
<email>marex@denx.de</email>
</author>
<published>2017-06-03T18:57:21+00:00</published>
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<id>urn:sha1:6b51100d8ac51c85301e23be31b1515136dc4ddd</id>
<content type='text'>
[ Upstream commit b7dfee2433576f1f030cb84cdb04b70f36554992 ]

The description of the CSI_SEL bit in the i.MX6 reference manual is
incorrect. It states "This bit defines which CSI is the input to the
IC. This bit is effective only if IC_INPUT is bit cleared".

From experiment it was found this is in fact not correct. The CSI_SEL
bit selects which CSI is input to _both_ the VDIC _and_ the IC. If the
IC_INPUT bit is set so that the IC is receiving from the VDIC, the IC
ignores the CSI_SEL bit, but CSI_SEL still selects which CSI the VDIC
receives from in that case.

Signed-off-by: Marek Vasut &lt;marex@denx.de&gt;
Signed-off-by: Steve Longerbeam &lt;steve_longerbeam@mentor.com&gt;
Signed-off-by: Philipp Zabel &lt;p.zabel@pengutronix.de&gt;
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</content>
</entry>
<entry>
<title>gpu: ipu-v3: csi: pass back mbus_code_to_bus_cfg error codes</title>
<updated>2018-09-26T06:36:38+00:00</updated>
<author>
<name>Enrico Scholz</name>
<email>enrico.scholz@sigma-chemnitz.de</email>
</author>
<published>2018-05-03T16:29:36+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=57726dfe96e8ed236def7e126fc76ba1c9836e2c'/>
<id>urn:sha1:57726dfe96e8ed236def7e126fc76ba1c9836e2c</id>
<content type='text'>
[ Upstream commit d36d0e6309dd8137cf438cbb680e72eb63c81425 ]

mbus_code_to_bus_cfg() can fail on unknown mbus codes; pass back the
error to the caller.

Signed-off-by: Enrico Scholz &lt;enrico.scholz@sigma-chemnitz.de&gt;
Signed-off-by: Jan Luebbe &lt;jlu@pengutronix.de&gt;
[p.zabel@pengutronix.de - renamed rc to ret for consistency]
Signed-off-by: Philipp Zabel &lt;p.zabel@pengutronix.de&gt;
Signed-off-by: Sasha Levin &lt;alexander.levin@microsoft.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>gpu: ipu-v3: Use ERR_CAST instead of ERR_PTR(PTR_ERR())</title>
<updated>2016-10-17T06:21:53+00:00</updated>
<author>
<name>Wei Yongjun</name>
<email>weiyongjun1@huawei.com</email>
</author>
<published>2016-09-21T15:12:24+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=4ad3e92c28057950c30ca19e32530eff9ee111bb'/>
<id>urn:sha1:4ad3e92c28057950c30ca19e32530eff9ee111bb</id>
<content type='text'>
Use ERR_CAST inlined function instead of ERR_PTR(PTR_ERR(...)).

Generated by: scripts/coccinelle/api/err_cast.cocci

Signed-off-by: Wei Yongjun &lt;weiyongjun1@huawei.com&gt;
Signed-off-by: Philipp Zabel &lt;p.zabel@pengutronix.de&gt;
</content>
</entry>
<entry>
<title>gpu: ipu-v3: Add queued image conversion support</title>
<updated>2016-09-19T06:30:27+00:00</updated>
<author>
<name>Steve Longerbeam</name>
<email>slongerbeam@gmail.com</email>
</author>
<published>2016-09-17T19:33:58+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=cd98e85a6b786da83e0b120b53a182d100c19c9b'/>
<id>urn:sha1:cd98e85a6b786da83e0b120b53a182d100c19c9b</id>
<content type='text'>
This patch implements image conversion support using the IC tasks, with
tiling to support scaling to and from images up to 4096x4096. Image
rotation is also supported. Image conversion requests are added to
a run queue under the IC tasks.

The internal API is subsystem agnostic (no V4L2 dependency except
for the use of V4L2 fourcc pixel formats).

Callers prepare for image conversion by calling
ipu_image_convert_prepare(), which initializes the parameters of
the conversion. The caller passes in the ipu and IC task to use for
the conversion, the input and output image formats, a rotation mode,
and a completion callback and completion context pointer:

struct ipu_image_converter_ctx *
ipu_image_convert_prepare(struct ipu_soc *ipu, enum ipu_ic_task ic_task,
                          struct ipu_image *in, struct ipu_image *out,
                          enum ipu_rotate_mode rot_mode,
                          ipu_image_converter_cb_t complete,
                          void *complete_context);

A new conversion context is created that is added to an IC task
context queue. The caller is given the new conversion context,
which can then be passed to the further APIs:

int ipu_image_convert_queue(struct ipu_image_converter_run *run);

This queues the given image conversion request run to a run queue,
and starts the conversion immediately if the run queue is empty. Only
the physaddr's of the input and output image buffers are needed,
since the conversion context was created previously with
ipu_image_convert_prepare(). When the conversion completes, the run
pointer is returned to the completion callback.

void ipu_image_convert_abort(struct ipu_image_converter_ctx *ctx);

This will abort any active or pending conversions for this context.
Any currently active or pending runs belonging to this context are
returned via the completion callback with an error status.

void ipu_image_convert_unprepare(struct ipu_image_converter_ctx *ctx);

Unprepares the conversion context. Any active or pending runs will
be aborted by calling ipu_image_convert_abort().

Signed-off-by: Steve Longerbeam &lt;steve_longerbeam@mentor.com&gt;
Signed-off-by: Philipp Zabel &lt;p.zabel@pengutronix.de&gt;
</content>
</entry>
</feed>
