<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/linux.git/drivers/gpu/ipu-v3, branch v4.14.263</title>
<subtitle>Linux kernel stable tree (mirror)</subtitle>
<id>https://git.radix-linux.su/kernel/linux.git/atom?h=v4.14.263</id>
<link rel='self' href='https://git.radix-linux.su/kernel/linux.git/atom?h=v4.14.263'/>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/'/>
<updated>2020-08-21T07:48:20+00:00</updated>
<entry>
<title>gpu: ipu-v3: image-convert: Combine rotate/no-rotate irq handlers</title>
<updated>2020-08-21T07:48:20+00:00</updated>
<author>
<name>Steve Longerbeam</name>
<email>slongerbeam@gmail.com</email>
</author>
<published>2020-06-17T22:40:37+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=24e014e194b66d5535163e3efc25da650a0120d8'/>
<id>urn:sha1:24e014e194b66d5535163e3efc25da650a0120d8</id>
<content type='text'>
[ Upstream commit 0f6245f42ce9b7e4d20f2cda8d5f12b55a44d7d1 ]

Combine the rotate_irq() and norotate_irq() handlers into a single
eof_irq() handler.

Signed-off-by: Steve Longerbeam &lt;slongerbeam@gmail.com&gt;
Signed-off-by: Philipp Zabel &lt;p.zabel@pengutronix.de&gt;
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</content>
</entry>
<entry>
<title>gpu: ipu-v3: pre: don't trigger update if buffer address doesn't change</title>
<updated>2019-12-05T14:37:56+00:00</updated>
<author>
<name>Lucas Stach</name>
<email>l.stach@pengutronix.de</email>
</author>
<published>2018-12-18T15:46:29+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=189f921470547fc15f1e4c49bb5a27f9b4a0b6f4'/>
<id>urn:sha1:189f921470547fc15f1e4c49bb5a27f9b4a0b6f4</id>
<content type='text'>
[ Upstream commit eb0200a4357da100064971689d3a0e9e3cf57f33 ]

On a NOP double buffer update where current buffer address is the same
as the next buffer address, the SDW_UPDATE bit clears too late. As we
are now using this bit to determine when it is safe to signal flip
completion to userspace this will delay completion of atomic commits
where one plane doesn't change the buffer by a whole frame period.

Fix this by remembering the last buffer address and just skip the
double buffer update if it would not change the buffer address.

Signed-off-by: Lucas Stach &lt;l.stach@pengutronix.de&gt;
[p.zabel@pengutronix.de: initialize last_bufaddr in ipu_pre_configure]
Signed-off-by: Philipp Zabel &lt;p.zabel@pengutronix.de&gt;
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</content>
</entry>
<entry>
<title>gpu: ipu-v3: ipu-ic: Fix saturation bit offset in TPMEM</title>
<updated>2019-07-31T05:28:41+00:00</updated>
<author>
<name>Steve Longerbeam</name>
<email>slongerbeam@gmail.com</email>
</author>
<published>2019-05-22T01:03:13+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=3ee5a2fb29de0be33bc7391d67092719a7e6586f'/>
<id>urn:sha1:3ee5a2fb29de0be33bc7391d67092719a7e6586f</id>
<content type='text'>
commit 3d1f62c686acdedf5ed9642b763f3808d6a47d1e upstream.

The saturation bit was being set at bit 9 in the second 32-bit word
of the TPMEM CSC. This isn't correct, the saturation bit is bit 42,
which is bit 10 of the second word.

Fixes: 1aa8ea0d2bd5d ("gpu: ipu-v3: Add Image Converter unit")

Signed-off-by: Steve Longerbeam &lt;slongerbeam@gmail.com&gt;
Reviewed-by: Philipp Zabel &lt;p.zabel@pengutronix.de&gt;
Cc: stable@vger.kernel.org
Signed-off-by: Philipp Zabel &lt;p.zabel@pengutronix.de&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;

</content>
</entry>
<entry>
<title>gpu: ipu-v3: dp: fix CSC handling</title>
<updated>2019-05-16T17:42:24+00:00</updated>
<author>
<name>Lucas Stach</name>
<email>l.stach@pengutronix.de</email>
</author>
<published>2019-04-12T15:59:40+00:00</published>
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<id>urn:sha1:22b83c13f896fc3d73e36b0e5848eac107f7a397</id>
<content type='text'>
[ Upstream commit d4fad0a426c6e26f48c9a7cdd21a7fe9c198d645 ]

Initialize the flow input colorspaces to unknown and reset to that value
when the channel gets disabled. This avoids the state getting mixed up
with a previous mode.

Also keep the CSC settings for the background flow intact when disabling
the foreground flow.

Root-caused-by: Jonathan Marek &lt;jonathan@marek.ca&gt;
Signed-off-by: Lucas Stach &lt;l.stach@pengutronix.de&gt;
Signed-off-by: Philipp Zabel &lt;p.zabel@pengutronix.de&gt;
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</content>
</entry>
<entry>
<title>gpu: ipu-v3: Fix CSI offsets for imx53</title>
<updated>2019-03-23T13:35:11+00:00</updated>
<author>
<name>Steve Longerbeam</name>
<email>slongerbeam@gmail.com</email>
</author>
<published>2018-10-17T00:31:40+00:00</published>
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<id>urn:sha1:3aa47dba7d7fa67ce62f7843cf0f4bbfe26d6b45</id>
<content type='text'>
[ Upstream commit bb867d219fda7fbaabea3314702474c4eac2b91d ]

The CSI offsets are wrong for both CSI0 and CSI1. They are at
physical address 0x1e030000 and 0x1e038000 respectively.

Fixes: 2ffd48f2e7 ("gpu: ipu-v3: Add Camera Sensor Interface unit")

Signed-off-by: Steve Longerbeam &lt;slongerbeam@gmail.com&gt;
Signed-off-by: Philipp Zabel &lt;p.zabel@pengutronix.de&gt;
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</content>
</entry>
<entry>
<title>gpu: ipu-v3: Fix i.MX51 CSI control registers offset</title>
<updated>2019-03-23T13:35:10+00:00</updated>
<author>
<name>Alexander Shiyan</name>
<email>shc_work@mail.ru</email>
</author>
<published>2018-12-20T08:06:38+00:00</published>
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<id>urn:sha1:a0e11262c67ef2eb75f93651643fb8345ab282c4</id>
<content type='text'>
[ Upstream commit 2c0408dd0d8906b26fe8023889af7adf5e68b2c2 ]

The CSI0/CSI1 registers offset is at +0xe030000/+0xe038000 relative
to the control module registers on IPUv3EX.
This patch fixes wrong values for i.MX51 CSI0/CSI1.

Fixes: 2ffd48f2e7 ("gpu: ipu-v3: Add Camera Sensor Interface unit")

Signed-off-by: Alexander Shiyan &lt;shc_work@mail.ru&gt;
Signed-off-by: Philipp Zabel &lt;p.zabel@pengutronix.de&gt;
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</content>
</entry>
<entry>
<title>gpu: ipu-v3: image-convert: Prevent race between run and unprepare</title>
<updated>2019-02-12T18:45:56+00:00</updated>
<author>
<name>Steve Longerbeam</name>
<email>slongerbeam@gmail.com</email>
</author>
<published>2018-09-19T23:07:18+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=12101aa36f3d05bea09ec534cbc6b910880f78e6'/>
<id>urn:sha1:12101aa36f3d05bea09ec534cbc6b910880f78e6</id>
<content type='text'>
[ Upstream commit 819bec35c8c9706185498c9222bd244e0781ad35 ]

Prevent possible race by parallel threads between ipu_image_convert_run()
and ipu_image_convert_unprepare(). This involves setting ctx-&gt;aborting
to true unconditionally so that no new job runs can be queued during
unprepare, and holding the ctx-&gt;aborting flag until the context is freed.

Note that the "normal" ipu_image_convert_abort() case (e.g. not during
context unprepare) should clear the ctx-&gt;aborting flag after aborting
any active run and clearing the context's pending queue. This is because
it should be possible to continue to use the conversion context and queue
more runs after an abort.

Signed-off-by: Steve Longerbeam &lt;slongerbeam@gmail.com&gt;
Tested-by: Philipp Zabel &lt;p.zabel@pengutronix.de&gt;
Signed-off-by: Philipp Zabel &lt;p.zabel@pengutronix.de&gt;
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</content>
</entry>
<entry>
<title>gpu: ipu-v3: csi: pass back mbus_code_to_bus_cfg error codes</title>
<updated>2018-09-26T06:38:11+00:00</updated>
<author>
<name>Enrico Scholz</name>
<email>enrico.scholz@sigma-chemnitz.de</email>
</author>
<published>2018-05-03T16:29:36+00:00</published>
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<id>urn:sha1:ed3151e4221452a77305e28ba1728db84bc08429</id>
<content type='text'>
[ Upstream commit d36d0e6309dd8137cf438cbb680e72eb63c81425 ]

mbus_code_to_bus_cfg() can fail on unknown mbus codes; pass back the
error to the caller.

Signed-off-by: Enrico Scholz &lt;enrico.scholz@sigma-chemnitz.de&gt;
Signed-off-by: Jan Luebbe &lt;jlu@pengutronix.de&gt;
[p.zabel@pengutronix.de - renamed rc to ret for consistency]
Signed-off-by: Philipp Zabel &lt;p.zabel@pengutronix.de&gt;
Signed-off-by: Sasha Levin &lt;alexander.levin@microsoft.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>gpu: ipu-v3: default to id 0 on missing OF alias</title>
<updated>2018-09-19T20:43:39+00:00</updated>
<author>
<name>Philipp Zabel</name>
<email>p.zabel@pengutronix.de</email>
</author>
<published>2018-06-21T19:13:38+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=8e6ee30ad80f8a7acb371a0ce3599c435dcc9a15'/>
<id>urn:sha1:8e6ee30ad80f8a7acb371a0ce3599c435dcc9a15</id>
<content type='text'>
[ Upstream commit 2d87e6c1b99c402360fdfe19ce4f579ab2f96adf ]

This is better than storing -ENODEV in the id number. This fixes SoCs
with only one IPU that don't specify an IPU alias in the device tree.

Signed-off-by: Philipp Zabel &lt;p.zabel@pengutronix.de&gt;
Signed-off-by: Sasha Levin &lt;alexander.levin@microsoft.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>gpu: ipu-v3: prg: avoid possible array underflow</title>
<updated>2018-05-30T05:52:15+00:00</updated>
<author>
<name>Arnd Bergmann</name>
<email>arnd@arndb.de</email>
</author>
<published>2018-03-15T16:19:57+00:00</published>
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<id>urn:sha1:418c85ea458a01522a2a61f5fd111043940b8e4e</id>
<content type='text'>
[ Upstream commit 746d024c3211813946b319411aeb2b47767f8fb0 ]

gcc-8 reports that we access an array with a negative index
in an error case:

drivers/gpu/ipu-v3/ipu-prg.c: In function 'ipu_prg_channel_disable':
drivers/gpu/ipu-v3/ipu-prg.c:252:43: error: array subscript -22 is below array bounds of 'struct ipu_prg_channel[3]' [-Werror=array-bounds]

This moves the range check in front of the first time that
variable gets used.

Signed-off-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
Signed-off-by: Philipp Zabel &lt;p.zabel@pengutronix.de&gt;
Signed-off-by: Sasha Levin &lt;alexander.levin@microsoft.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
</feed>
