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<title>kernel/linux.git/drivers/gpu/host1x/dev.c, branch v6.6.132</title>
<subtitle>Linux kernel stable tree (mirror)</subtitle>
<id>https://git.radix-linux.su/kernel/linux.git/atom?h=v6.6.132</id>
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<updated>2023-07-21T07:11:36+00:00</updated>
<entry>
<title>gpu/host1x: Explicitly include correct DT includes</title>
<updated>2023-07-21T07:11:36+00:00</updated>
<author>
<name>Rob Herring</name>
<email>robh@kernel.org</email>
</author>
<published>2023-07-14T17:45:49+00:00</published>
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<id>urn:sha1:573cbf48c636c8107266d4103d4ef24027b03c75</id>
<content type='text'>
The DT of_device.h and of_platform.h date back to the separate
of_platform_bus_type before it as merged into the regular platform bus.
As part of that merge prepping Arm DT support 13 years ago, they
"temporarily" include each other. They also include platform_device.h
and of.h. As a result, there's a pretty much random mix of those include
files used throughout the tree. In order to detangle these headers and
replace the implicit includes with struct declarations, users need to
explicitly include the correct includes.

Signed-off-by: Rob Herring &lt;robh@kernel.org&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
Link: https://patchwork.freedesktop.org/patch/msgid/20230714174549.4056675-1-robh@kernel.org
</content>
</entry>
<entry>
<title>gpu: host1x: fix uninitialized variable use</title>
<updated>2023-03-20T18:12:37+00:00</updated>
<author>
<name>Arnd Bergmann</name>
<email>arnd@arndb.de</email>
</author>
<published>2023-01-27T22:14:00+00:00</published>
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<id>urn:sha1:7d31677bb7b1944ac89e9155110dc1b9acbb3895</id>
<content type='text'>
The error handling for platform_get_irq() failing no longer works after
a recent change, clang now points this out with a warning:

  drivers/gpu/host1x/dev.c:520:6: error: variable 'syncpt_irq' is uninitialized when used here [-Werror,-Wuninitialized]
          if (syncpt_irq &lt; 0)
              ^~~~~~~~~~

Fix this by removing the variable and checking the correct error status.

Fixes: 625d4ffb438c ("gpu: host1x: Rewrite syncpoint interrupt handling")
Signed-off-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
Reviewed-by: Jon Hunter &lt;jonathanh@nvidia.com&gt;
Reviewed-by: Nick Desaulniers &lt;ndesaulniers@google.com&gt;
Reviewed-by: Mikko Perttunen &lt;mperttunen@nvidia.com&gt;
Reviewed-by: Nathan Chancellor &lt;nathan@kernel.org&gt;
Signed-off-by: Linus Torvalds &lt;torvalds@linux-foundation.org&gt;
</content>
</entry>
<entry>
<title>gpu: host1x: Rewrite syncpoint interrupt handling</title>
<updated>2023-01-26T14:55:38+00:00</updated>
<author>
<name>Mikko Perttunen</name>
<email>mperttunen@nvidia.com</email>
</author>
<published>2023-01-19T13:09:20+00:00</published>
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<id>urn:sha1:625d4ffb438cacc9b1ebaa48748cdc7171587cdc</id>
<content type='text'>
Move from the old, complex intr handling code to a new implementation
based on dma_fences. While there is a fair bit of churn to get there,
the new implementation is much simpler and likely faster as well due
to allowing signaling directly from interrupt context.

Signed-off-by: Mikko Perttunen &lt;mperttunen@nvidia.com&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>gpu: host1x: Add stream ID register data for NVDEC on Tegra234</title>
<updated>2022-11-25T15:14:58+00:00</updated>
<author>
<name>Mikko Perttunen</name>
<email>mperttunen@nvidia.com</email>
</author>
<published>2022-09-20T08:12:00+00:00</published>
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<id>urn:sha1:97b93b7a4adcf3f9b07a323571685e612388b7d8</id>
<content type='text'>
Add entries for NVDEC to the Tegra234 SID table.

Signed-off-by: Mikko Perttunen &lt;mperttunen@nvidia.com&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>gpu: host1x: Avoid trying to use GART on Tegra20</title>
<updated>2022-11-18T08:33:20+00:00</updated>
<author>
<name>Robin Murphy</name>
<email>robin.murphy@arm.com</email>
</author>
<published>2022-10-20T14:23:40+00:00</published>
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<id>urn:sha1:c2418f911a31a266af4fbaca998dc73d3676475a</id>
<content type='text'>
Since commit c7e3ca515e78 ("iommu/tegra: gart: Do not register with
bus") quite some time ago, the GART driver has effectively disabled
itself to avoid issues with the GPU driver expecting it to work in ways
that it doesn't. As of commit 57365a04c921 ("iommu: Move bus setup to
IOMMU device registration") that bodge no longer works, but really the
GPU driver should be responsible for its own behaviour anyway. Make the
workaround explicit.

Reported-by: Jon Hunter &lt;jonathanh@nvidia.com&gt;
Suggested-by: Dmitry Osipenko &lt;digetx@gmail.com&gt;
Signed-off-by: Robin Murphy &lt;robin.murphy@arm.com&gt;
Tested-by: Jon Hunter &lt;jonathanh@nvidia.com&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>gpu: host1x: Tegra234 device data and headers</title>
<updated>2022-07-08T14:27:52+00:00</updated>
<author>
<name>Mikko Perttunen</name>
<email>mperttunen@nvidia.com</email>
</author>
<published>2022-06-27T14:20:04+00:00</published>
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<id>urn:sha1:9abdd497cd0ac08ed55aea30de1e46d73eef9fc5</id>
<content type='text'>
Add device data and chip headers for Tegra234.

Signed-off-by: Mikko Perttunen &lt;mperttunen@nvidia.com&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>gpu: host1x: Allow reset to be missing</title>
<updated>2022-07-08T14:27:52+00:00</updated>
<author>
<name>Mikko Perttunen</name>
<email>mperttunen@nvidia.com</email>
</author>
<published>2022-06-27T14:20:02+00:00</published>
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<id>urn:sha1:ee8f894f3fb326ac17b243441b8cbbb6fb0d0932</id>
<content type='text'>
Host1x on Tegra234 does not have a software-controllable reset line.
As such, don't bail out if we don't find one in the device tree.

Signed-off-by: Mikko Perttunen &lt;mperttunen@nvidia.com&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>gpu: host1x: Program virtualization tables</title>
<updated>2022-07-08T14:27:52+00:00</updated>
<author>
<name>Mikko Perttunen</name>
<email>mperttunen@nvidia.com</email>
</author>
<published>2022-06-27T14:20:01+00:00</published>
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<id>urn:sha1:939179fab8ff42165c1e9a487495a3f2f3319e18</id>
<content type='text'>
Program virtualization tables specifying which VMs have access to which
Host1x hardware resources. Programming these has become mandatory in
Tegra234.

For now, since the driver does not operate as a Host1x hypervisor, we
basically allow access to everything to everyone.

Signed-off-by: Mikko Perttunen &lt;mperttunen@nvidia.com&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>gpu: host1x: Simplify register mapping and add common aperture</title>
<updated>2022-07-08T14:27:52+00:00</updated>
<author>
<name>Mikko Perttunen</name>
<email>mperttunen@nvidia.com</email>
</author>
<published>2022-06-27T14:20:00+00:00</published>
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<id>urn:sha1:97dea367d8dab90b520cda589f83c60514013110</id>
<content type='text'>
Refactor 'regs' property loading using devm_platform_ioremap_*
and add loading of the 'common' region found on Tegra234.

Signed-off-by: Mikko Perttunen &lt;mperttunen@nvidia.com&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>gpu: host1x: Add context device management code</title>
<updated>2022-07-08T14:27:52+00:00</updated>
<author>
<name>Mikko Perttunen</name>
<email>mperttunen@nvidia.com</email>
</author>
<published>2022-06-27T14:19:48+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=8aa5bcb61612060429223d1fbb7a1c30a579fc1f'/>
<id>urn:sha1:8aa5bcb61612060429223d1fbb7a1c30a579fc1f</id>
<content type='text'>
Add code to register context devices from device tree, allocate them
out and manage their refcounts.

Signed-off-by: Mikko Perttunen &lt;mperttunen@nvidia.com&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
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