kernel/linux.git/drivers/gpu/host1x/dev.c, branch v6.1.168Linux kernel stable tree (mirror)https://git.radix-linux.su/kernel/linux.git/atom?h=v6.1.1682022-11-18T08:33:20+00:00gpu: host1x: Avoid trying to use GART on Tegra202022-11-18T08:33:20+00:00Robin Murphyrobin.murphy@arm.com2022-10-20T14:23:40+00:00urn:sha1:c2418f911a31a266af4fbaca998dc73d3676475a
Since commit c7e3ca515e78 ("iommu/tegra: gart: Do not register with
bus") quite some time ago, the GART driver has effectively disabled
itself to avoid issues with the GPU driver expecting it to work in ways
that it doesn't. As of commit 57365a04c921 ("iommu: Move bus setup to
IOMMU device registration") that bodge no longer works, but really the
GPU driver should be responsible for its own behaviour anyway. Make the
workaround explicit.
Reported-by: Jon Hunter <jonathanh@nvidia.com>
Suggested-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Robin Murphy <robin.murphy@arm.com>
Tested-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
gpu: host1x: Tegra234 device data and headers2022-07-08T14:27:52+00:00Mikko Perttunenmperttunen@nvidia.com2022-06-27T14:20:04+00:00urn:sha1:9abdd497cd0ac08ed55aea30de1e46d73eef9fc5
Add device data and chip headers for Tegra234.
Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
gpu: host1x: Allow reset to be missing2022-07-08T14:27:52+00:00Mikko Perttunenmperttunen@nvidia.com2022-06-27T14:20:02+00:00urn:sha1:ee8f894f3fb326ac17b243441b8cbbb6fb0d0932
Host1x on Tegra234 does not have a software-controllable reset line.
As such, don't bail out if we don't find one in the device tree.
Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
gpu: host1x: Program virtualization tables2022-07-08T14:27:52+00:00Mikko Perttunenmperttunen@nvidia.com2022-06-27T14:20:01+00:00urn:sha1:939179fab8ff42165c1e9a487495a3f2f3319e18
Program virtualization tables specifying which VMs have access to which
Host1x hardware resources. Programming these has become mandatory in
Tegra234.
For now, since the driver does not operate as a Host1x hypervisor, we
basically allow access to everything to everyone.
Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
gpu: host1x: Simplify register mapping and add common aperture2022-07-08T14:27:52+00:00Mikko Perttunenmperttunen@nvidia.com2022-06-27T14:20:00+00:00urn:sha1:97dea367d8dab90b520cda589f83c60514013110
Refactor 'regs' property loading using devm_platform_ioremap_*
and add loading of the 'common' region found on Tegra234.
Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
gpu: host1x: Add context device management code2022-07-08T14:27:52+00:00Mikko Perttunenmperttunen@nvidia.com2022-06-27T14:19:48+00:00urn:sha1:8aa5bcb61612060429223d1fbb7a1c30a579fc1f
Add code to register context devices from device tree, allocate them
out and manage their refcounts.
Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
gpu: host1x: Fix a memory leak in 'host1x_remove()'2022-03-01T10:13:09+00:00Christophe JAILLETchristophe.jaillet@wanadoo.fr2021-11-07T21:16:36+00:00urn:sha1:025c6643a81564f066d8381b9e2f4603e0f8438f
Add a missing 'host1x_channel_list_free()' call in the remove function,
as already done in the error handling path of the probe function.
Fixes: 8474b02531c4 ("gpu: host1x: Refactor channel allocation code")
Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr>
Signed-off-by: Thierry Reding <treding@nvidia.com>
gpu: host1x: Fix an error handling path in 'host1x_probe()'2022-03-01T10:13:03+00:00Christophe JAILLETchristophe.jaillet@wanadoo.fr2021-11-07T21:16:25+00:00urn:sha1:e5d5db1a79a5929b9ced99472f9a748a243d6a69
Add the missing 'host1x_bo_cache_destroy()' call in the error handling
path of the probe, as already done in the remove function.
In order to simplify the error handling, move the 'host1x_bo_cache_init()'
call after all the devm_ function.
Fixes: 1f39b1dfa53c ("drm/tegra: Implement buffer object cache")
Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr>
Signed-off-by: Thierry Reding <treding@nvidia.com>
gpu: host1x: Add back arm_iommu_detach_device()2021-12-16T13:28:51+00:00Dmitry Osipenkodigetx@gmail.com2021-12-04T14:58:48+00:00urn:sha1:d5185965c3b59073c4520bad7dd2adf725b9abba
Host1x DMA buffer isn't mapped properly when CONFIG_ARM_DMA_USE_IOMMU=y.
The memory management code of Host1x driver has a longstanding overhaul
overdue and it's not obvious where the problem is in this case. Hence
let's add back the old workaround which we already had sometime before.
It explicitly detaches Host1x device from the offending implicit IOMMU
domain. This fixes a completely broken Host1x DMA in case of ARM32
multiplatform kernel config.
Cc: stable@vger.kernel.org
Fixes: af1cbfb9bf0f ("gpu: host1x: Support DMA mapping of buffers")
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
gpu: host1x: Add initial runtime PM and OPP support2021-12-16T13:07:07+00:00Dmitry Osipenkodigetx@gmail.com2021-11-30T23:23:15+00:00urn:sha1:6b6776e2ab8ac7086cf31ad339411df7681715b7
Add runtime PM and OPP support to the Host1x driver. For the starter we
will keep host1x always-on because dynamic power management require a major
refactoring of the driver code since lot's of code paths are missing the
RPM handling and we're going to remove some of these paths in the future.
Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org>
Tested-by: Peter Geis <pgwipeout@gmail.com> # Ouya T30
Tested-by: Paul Fertser <fercerpav@gmail.com> # PAZ00 T20
Tested-by: Nicolas Chauvet <kwizart@gmail.com> # PAZ00 T20 and TK1 T124
Tested-by: Matt Merhar <mattmerhar@protonmail.com> # Ouya T30
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>