<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/linux.git/drivers/gpu/drm/xe/xe_pcode_api.h, branch v6.12.80</title>
<subtitle>Linux kernel stable tree (mirror)</subtitle>
<id>https://git.radix-linux.su/kernel/linux.git/atom?h=v6.12.80</id>
<link rel='self' href='https://git.radix-linux.su/kernel/linux.git/atom?h=v6.12.80'/>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/'/>
<updated>2024-01-09T22:47:24+00:00</updated>
<entry>
<title>drm/xe: Add vram frequency sysfs attributes</title>
<updated>2024-01-09T22:47:24+00:00</updated>
<author>
<name>Sujaritha Sundaresan</name>
<email>sujaritha.sundaresan@intel.com</email>
</author>
<published>2024-01-09T11:04:18+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=4ae3aeab32d7f37cde4724524f5525703e5a9b54'/>
<id>urn:sha1:4ae3aeab32d7f37cde4724524f5525703e5a9b54</id>
<content type='text'>
Add vram frequency sysfs attributes under the below hierarchy;

/device/tile#/memory/freq0
			|-max_freq
			|-min_freq

v2: Drop "vram" from attribute names (Rodrigo)

v3: Add documentation for new sysfs (Riana)
    Drop prefix from XEHP_PCODE_FREQUENCY_CONFIG (Riana)

v4: Create sysfs under tile#/freq0 after removal of
    physical_memsize attrbute

v5: Revert back to creating sysfs under tile#/memory/freq0
    Remove definition of GT_FREQUENCY_MULTIPLIER (Rodrigo)

v6: Rename attributes to max/min_freq (Anshuman)
    Fix review comments (Rodrigo)

v7: Make documentation more verbose
    Move sysfs to separate file (Anshuman)

v8: Fix platform specific conditions and add kernel doc (Anshuman)
    Fix typos and remove redundant headers (Riana)

v9: Fix typo (Riana)
    Change function name to include "sysfs" (Lucas)

Signed-off-by: Sujaritha Sundaresan &lt;sujaritha.sundaresan@intel.com&gt;
Reviewed-by: Anshuman Gupta &lt;anshuman.gupta@intel.com&gt;
Link: https://lore.kernel.org/r/20240109110418.2065101-1-sujaritha.sundaresan@intel.com
Signed-off-by: Rodrigo Vivi &lt;rodrigo.vivi@intel.com&gt;
</content>
</entry>
<entry>
<title>drm/xe/hwmon: Expose card reactive critical power</title>
<updated>2023-12-21T16:42:08+00:00</updated>
<author>
<name>Badal Nilawar</name>
<email>badal.nilawar@intel.com</email>
</author>
<published>2023-09-25T08:18:39+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=92d44a422d0d9e08ed9020cbf11915909e1f2ad3'/>
<id>urn:sha1:92d44a422d0d9e08ed9020cbf11915909e1f2ad3</id>
<content type='text'>
Expose the card reactive critical (I1) power. I1 is exposed as
power1_crit in microwatts (typically for client products) or as
curr1_crit in milliamperes (typically for server).

v2: Move PCODE_MBOX macro to pcode file (Riana)
v3: s/IS_DG2/(gt_to_xe(gt)-&gt;info.platform == XE_DG2)
v4: Fix review comments (Andi)

Acked-by: Rodrigo Vivi &lt;rodrigo.vivi@intel.com&gt;
Reviewed-by: Riana Tauro &lt;riana.tauro@intel.com&gt;
Signed-off-by: Badal Nilawar &lt;badal.nilawar@intel.com&gt;
Reviewed-by: Andi Shyti &lt;andi.shyti@linux.intel.com&gt;
Link: https://lore.kernel.org/r/20230925081842.3566834-3-badal.nilawar@intel.com
Signed-off-by: Rodrigo Vivi &lt;rodrigo.vivi@intel.com&gt;
</content>
</entry>
<entry>
<title>drm/xe: Use XE_REG/XE_REG_MCR</title>
<updated>2023-12-19T23:32:21+00:00</updated>
<author>
<name>Lucas De Marchi</name>
<email>lucas.demarchi@intel.com</email>
</author>
<published>2023-04-27T22:32:53+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=3512a78a3cefcd9ec0177771f637de0fe4a64ea2'/>
<id>urn:sha1:3512a78a3cefcd9ec0177771f637de0fe4a64ea2</id>
<content type='text'>
These should replace the _MMIO() and MCR_REG() from i915, with the goal
of being more extensible, allowing to pass the additional fields for
struct xe_reg and struct xe_reg_mcr. Replace all uses of _MMIO() and
MCR_REG() in xe.

Since the RTP, reg-save-restore and WA infra are not ready to use the
new type, just undef the macro like was done for the i915 types
previously. That conversion will come later.

v2: Remove MEDIA_SOFT_SCRATCH_COUNT/MEDIA_SOFT_SCRATCH re-added by
    mistake (Matt Roper)

Reviewed-by: Matt Roper &lt;matthew.d.roper@intel.com&gt;
Link: https://lore.kernel.org/r/20230427223256.1432787-8-lucas.demarchi@intel.com
Signed-off-by: Lucas De Marchi &lt;lucas.demarchi@intel.com&gt;
Signed-off-by: Rodrigo Vivi &lt;rodrigo.vivi@intel.com&gt;
</content>
</entry>
<entry>
<title>drm/xe: Do not spread i915_reg_defs.h include</title>
<updated>2023-12-19T23:29:23+00:00</updated>
<author>
<name>Lucas De Marchi</name>
<email>lucas.demarchi@intel.com</email>
</author>
<published>2023-02-25T20:10:39+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=8cb49012ac171698b1253dea45e56c284e997d38'/>
<id>urn:sha1:8cb49012ac171698b1253dea45e56c284e997d38</id>
<content type='text'>
Reduce the use of i915_reg_defs.h so it can be encapsulated in a single
place.

1) If it was being included by mistake, remove
2) If it was included for FIELD_GET()/FIELD_PREP()/GENMASK() and the
   like, just include &lt;linux/bitfield.h&gt;
3) If it was included to be able to define additional registers, move
   the registers to the relavant headers (regs/xe_regs.h or
   regs/xe_gt_regs.h)

v2:
  - Squash commit fixing i915_reg_defs.h include and with the one
    introducing regs/xe_reg_defs.h
  - Remove more cases of i915_reg_defs.h being used when all it was
    needed was linux/bitfield.h  (Matt Roper)
  - Move some  registers to the corresponding regs/*.h file (Matt Roper)

Signed-off-by: Lucas De Marchi &lt;lucas.demarchi@intel.com&gt;
Reviewed-by: Matt Roper &lt;matthew.d.roper@intel.com&gt;
Signed-off-by: Rodrigo Vivi &lt;rodrigo.vivi@intel.com&gt;
[Rodrigo squashed here the removal of the i915 include]
</content>
</entry>
<entry>
<title>drm/xe: Introduce a new DRM driver for Intel GPUs</title>
<updated>2023-12-12T19:05:48+00:00</updated>
<author>
<name>Matthew Brost</name>
<email>matthew.brost@intel.com</email>
</author>
<published>2023-03-30T21:31:57+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=dd08ebf6c3525a7ea2186e636df064ea47281987'/>
<id>urn:sha1:dd08ebf6c3525a7ea2186e636df064ea47281987</id>
<content type='text'>
Xe, is a new driver for Intel GPUs that supports both integrated and
discrete platforms starting with Tiger Lake (first Intel Xe Architecture).

The code is at a stage where it is already functional and has experimental
support for multiple platforms starting from Tiger Lake, with initial
support implemented in Mesa (for Iris and Anv, our OpenGL and Vulkan
drivers), as well as in NEO (for OpenCL and Level0).

The new Xe driver leverages a lot from i915.

As for display, the intent is to share the display code with the i915
driver so that there is maximum reuse there. But it is not added
in this patch.

This initial work is a collaboration of many people and unfortunately
the big squashed patch won't fully honor the proper credits. But let's
get some git quick stats so we can at least try to preserve some of the
credits:

Co-developed-by: Matthew Brost &lt;matthew.brost@intel.com&gt;
Co-developed-by: Matthew Auld &lt;matthew.auld@intel.com&gt;
Co-developed-by: Matt Roper &lt;matthew.d.roper@intel.com&gt;
Co-developed-by: Thomas Hellström &lt;thomas.hellstrom@linux.intel.com&gt;
Co-developed-by: Francois Dugast &lt;francois.dugast@intel.com&gt;
Co-developed-by: Lucas De Marchi &lt;lucas.demarchi@intel.com&gt;
Co-developed-by: Maarten Lankhorst &lt;maarten.lankhorst@linux.intel.com&gt;
Co-developed-by: Philippe Lecluse &lt;philippe.lecluse@intel.com&gt;
Co-developed-by: Nirmoy Das &lt;nirmoy.das@intel.com&gt;
Co-developed-by: Jani Nikula &lt;jani.nikula@intel.com&gt;
Co-developed-by: José Roberto de Souza &lt;jose.souza@intel.com&gt;
Co-developed-by: Rodrigo Vivi &lt;rodrigo.vivi@intel.com&gt;
Co-developed-by: Dave Airlie &lt;airlied@redhat.com&gt;
Co-developed-by: Faith Ekstrand &lt;faith.ekstrand@collabora.com&gt;
Co-developed-by: Daniel Vetter &lt;daniel.vetter@ffwll.ch&gt;
Co-developed-by: Mauro Carvalho Chehab &lt;mchehab@kernel.org&gt;
Signed-off-by: Rodrigo Vivi &lt;rodrigo.vivi@intel.com&gt;
Signed-off-by: Matthew Brost &lt;matthew.brost@intel.com&gt;
</content>
</entry>
</feed>
