<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/linux.git/drivers/gpu/drm/tegra, branch v5.5.13</title>
<subtitle>Linux kernel stable tree (mirror)</subtitle>
<id>https://git.radix-linux.su/kernel/linux.git/atom?h=v5.5.13</id>
<link rel='self' href='https://git.radix-linux.su/kernel/linux.git/atom?h=v5.5.13'/>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/'/>
<updated>2020-02-11T12:37:14+00:00</updated>
<entry>
<title>drm/tegra: Reuse IOVA mapping where possible</title>
<updated>2020-02-11T12:37:14+00:00</updated>
<author>
<name>Thierry Reding</name>
<email>treding@nvidia.com</email>
</author>
<published>2020-02-04T13:59:25+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=51df23649f9ec06c28216894a7c2893412b1e295'/>
<id>urn:sha1:51df23649f9ec06c28216894a7c2893412b1e295</id>
<content type='text'>
commit 273da5a046965ccf0ec79eb63f2d5173467e20fa upstream.

This partially reverts the DMA API support that was recently merged
because it was causing performance regressions on older Tegra devices.
Unfortunately, the cache maintenance performed by dma_map_sg() and
dma_unmap_sg() causes performance to drop by a factor of 10.

The right solution for this would be to cache mappings for buffers per
consumer device, but that's a bit involved. Instead, we simply revert to
the old behaviour of sharing IOVA mappings when we know that devices can
do so (i.e. they share the same IOMMU domain).

Cc: &lt;stable@vger.kernel.org&gt; # v5.5
Reported-by: Dmitry Osipenko &lt;digetx@gmail.com&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
Tested-by: Dmitry Osipenko &lt;digetx@gmail.com&gt;
Reviewed-by: Dmitry Osipenko &lt;digetx@gmail.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;

</content>
</entry>
<entry>
<title>drm/tegra: Relax IOMMU usage criteria on old Tegra</title>
<updated>2020-02-11T12:37:14+00:00</updated>
<author>
<name>Thierry Reding</name>
<email>treding@nvidia.com</email>
</author>
<published>2020-02-04T13:59:24+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=d71c74b18ddc1235030f01f11f44ebb7b5d097fc'/>
<id>urn:sha1:d71c74b18ddc1235030f01f11f44ebb7b5d097fc</id>
<content type='text'>
commit 2d9384ff91770a71bd1ff24c25952ef1187a0e9c upstream.

Older Tegra devices only allow addressing 32 bits of memory, so whether
or not the host1x is attached to an IOMMU doesn't matter. host1x IOMMU
attachment is only needed on devices that can address memory beyond the
32-bit boundary and where the host1x doesn't support the wide GATHER
opcode that allows it to access buffers at higher addresses.

Cc: &lt;stable@vger.kernel.org&gt; # v5.5
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
Tested-by: Dmitry Osipenko &lt;digetx@gmail.com&gt;
Reviewed-by: Dmitry Osipenko &lt;digetx@gmail.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;

</content>
</entry>
<entry>
<title>drm/tegra: Run hub cleanup on -&gt;remove()</title>
<updated>2019-12-04T12:38:16+00:00</updated>
<author>
<name>Thierry Reding</name>
<email>treding@nvidia.com</email>
</author>
<published>2019-12-03T16:19:14+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=d66dfcf80d0f55f95b9ea4a45ca41cc7115e9789'/>
<id>urn:sha1:d66dfcf80d0f55f95b9ea4a45ca41cc7115e9789</id>
<content type='text'>
The call to tegra_display_hub_cleanup() that takes care of disabling the
window groups is missing from the driver's -&gt;remove() callback. Call it
to make sure the runtime PM reference counts for the display controllers
are balanced.

Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>drm/tegra: sor: Make the +5V HDMI supply optional</title>
<updated>2019-12-04T12:38:01+00:00</updated>
<author>
<name>Thierry Reding</name>
<email>treding@nvidia.com</email>
</author>
<published>2019-12-03T16:19:13+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=b06e145f7030bea2f307d3dc68a6b9aaf2dd905c'/>
<id>urn:sha1:b06e145f7030bea2f307d3dc68a6b9aaf2dd905c</id>
<content type='text'>
The SOR supports multiple display modes, but only when driving an HDMI
monitor does it make sense to control the +5V power supply. eDP and DP
don't need this, so make it optional.

This fixes a crash observed during system suspend/resume.

Reviewed-by: Daniel Vetter &lt;daniel.vetter@ffwll.ch&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>drm/tegra: Silence expected errors on IOMMU attach</title>
<updated>2019-12-04T12:37:44+00:00</updated>
<author>
<name>Thierry Reding</name>
<email>treding@nvidia.com</email>
</author>
<published>2019-12-03T16:19:12+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=a8817489dc3e3b1910842958a3b9d9e4832e99b0'/>
<id>urn:sha1:a8817489dc3e3b1910842958a3b9d9e4832e99b0</id>
<content type='text'>
Subdevices may not be hooked up to an IOMMU via device tree. Detect such
situations and avoid confusing users by not emitting an error message.

Reviewed-by: Daniel Vetter &lt;daniel.vetter@ffwll.ch&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>drm/tegra: vic: Export module device table</title>
<updated>2019-12-04T12:37:27+00:00</updated>
<author>
<name>Thierry Reding</name>
<email>treding@nvidia.com</email>
</author>
<published>2019-12-03T16:19:11+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=82d73874d422b43359698f73c418a02322c886d5'/>
<id>urn:sha1:82d73874d422b43359698f73c418a02322c886d5</id>
<content type='text'>
Export the module device table to ensure the VIC compatible strings are
listed in the module's aliases table. This in turn causes the driver to
be automatically loaded on boot if VIC is the only enabled subdevice of
the logical host1x DRM device.

Reviewed-by: Daniel Vetter &lt;daniel.vetter@ffwll.ch&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>drm/tegra: sor: Implement system suspend/resume</title>
<updated>2019-12-04T12:37:10+00:00</updated>
<author>
<name>Thierry Reding</name>
<email>treding@nvidia.com</email>
</author>
<published>2019-12-03T16:19:10+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=be0b23f28c028bf11e47d16f79c784106286bcb7'/>
<id>urn:sha1:be0b23f28c028bf11e47d16f79c784106286bcb7</id>
<content type='text'>
Upon system suspend, make sure the +5V HDMI regulator is disabled. This
avoids potentially leaking current to the HDMI connector. This also
makes sure that upon resume the regulator is enabled again, which in
some cases is necessary to properly restore the state of the supply on
resume.

Reviewed-by: Daniel Vetter &lt;daniel.vetter@ffwll.ch&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>drm/tegra: Use proper IOVA address for cursor image</title>
<updated>2019-12-04T12:36:52+00:00</updated>
<author>
<name>Thierry Reding</name>
<email>treding@nvidia.com</email>
</author>
<published>2019-12-03T16:19:09+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=c52e167b41940186d0f4d7364950b654b79b3ef7'/>
<id>urn:sha1:c52e167b41940186d0f4d7364950b654b79b3ef7</id>
<content type='text'>
The IOVA address for the cursor is the result of mapping the buffer
object for the given display controller. Make sure to use the proper
IOVA address as stored in the cursor's plane state.

Reviewed-by: Daniel Vetter &lt;daniel.vetter@ffwll.ch&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>drm/tegra: gem: Remove premature import restrictions</title>
<updated>2019-12-04T12:36:23+00:00</updated>
<author>
<name>Thierry Reding</name>
<email>treding@nvidia.com</email>
</author>
<published>2019-12-03T16:19:08+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=49f821919bb9d45de7f1cde6072de01d36235b5d'/>
<id>urn:sha1:49f821919bb9d45de7f1cde6072de01d36235b5d</id>
<content type='text'>
All the display related blocks on Tegra require contiguous memory. Using
the DMA API, there is no knowing at import time which device will end up
using the buffer, so it's not known whether or not an IOMMU will be used
to map the buffer.

Move the check for non-contiguous buffers/mappings to the tegra_dc_pin()
function which is now the earliest point where it is known if a DMA BUF
can be used by the given device or not.

v2: add check for contiguous buffer/mapping in tegra_dc_pin()

Reviewed-by: Daniel Vetter &lt;daniel.vetter@ffwll.ch&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>drm/tegra: gem: Properly pin imported buffers</title>
<updated>2019-12-04T12:35:53+00:00</updated>
<author>
<name>Thierry Reding</name>
<email>treding@nvidia.com</email>
</author>
<published>2019-12-03T16:19:07+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=1f16deac766926f1f59a7c038e939b09ef8edfc8'/>
<id>urn:sha1:1f16deac766926f1f59a7c038e939b09ef8edfc8</id>
<content type='text'>
Buffers that are imported from a DMA-BUF don't have pages allocated with
them. At the same time an SG table for them can't be derived using the
DMA API helpers because the necessary information doesn't exist. However
there's already an SG table that was created during import, so this can
simply be duplicated.

Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
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