<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/linux.git/drivers/gpu/drm/tegra, branch linux-4.13.y</title>
<subtitle>Linux kernel stable tree (mirror)</subtitle>
<id>https://git.radix-linux.su/kernel/linux.git/atom?h=linux-4.13.y</id>
<link rel='self' href='https://git.radix-linux.su/kernel/linux.git/atom?h=linux-4.13.y'/>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/'/>
<updated>2017-06-26T22:28:30+00:00</updated>
<entry>
<title>Backmerge tag 'v4.12-rc7' into drm-next</title>
<updated>2017-06-26T22:28:30+00:00</updated>
<author>
<name>Dave Airlie</name>
<email>airlied@redhat.com</email>
</author>
<published>2017-06-26T21:24:49+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=6d61e70ccc21606ffb8a0a03bd3aba24f659502b'/>
<id>urn:sha1:6d61e70ccc21606ffb8a0a03bd3aba24f659502b</id>
<content type='text'>
Linux 4.12-rc7

Needed at least rc6 for drm-misc-next-fixes, may as well go to rc7
</content>
</entry>
<entry>
<title>Merge tag 'drm/tegra/for-4.13-rc1' of git://anongit.freedesktop.org/tegra/linux into drm-next</title>
<updated>2017-06-20T01:07:03+00:00</updated>
<author>
<name>Dave Airlie</name>
<email>airlied@redhat.com</email>
</author>
<published>2017-06-20T01:07:03+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=4a525bad68b424d167042342db19d0c0e80e8b29'/>
<id>urn:sha1:4a525bad68b424d167042342db19d0c0e80e8b29</id>
<content type='text'>
drm/tegra: Changes for v4.13-rc1

This starts off with the addition of more documentation for the host1x
and DRM drivers and finishes with a slew of fixes and enhancements for
the staging IOCTLs as a result of the awesome work done by Dmitry and
Erik on the grate reverse-engineering effort.

* tag 'drm/tegra/for-4.13-rc1' of git://anongit.freedesktop.org/tegra/linux:
  gpu: host1x: At first try a non-blocking allocation for the gather copy
  gpu: host1x: Refactor channel allocation code
  gpu: host1x: Remove unused host1x_cdma_stop() definition
  gpu: host1x: Remove unused 'struct host1x_cmdbuf'
  gpu: host1x: Check waits in the firewall
  gpu: host1x: Correct swapped arguments in the is_addr_reg() definition
  gpu: host1x: Forbid unrelated SETCLASS opcode in the firewall
  gpu: host1x: Forbid RESTART opcode in the firewall
  gpu: host1x: Forbid relocation address shifting in the firewall
  gpu: host1x: Do not leak BO's phys address to userspace
  gpu: host1x: Correct host1x_job_pin() error handling
  gpu: host1x: Initialize firewall class to the job's one
  drm/tegra: dc: Disable plane if it is invisible
  drm/tegra: dc: Apply clipping to the plane
  drm/tegra: dc: Avoid reset asserts on Tegra20
  drm/tegra: Check syncpoint ID in the 'submit' IOCTL
  drm/tegra: Correct copying of waitchecks and disable them in the 'submit' IOCTL
  drm/tegra: Check for malformed offsets and sizes in the 'submit' IOCTL
  drm/tegra: Add driver documentation
  gpu: host1x: Flesh out kerneldoc
</content>
</entry>
<entry>
<title>gpu: host1x: Refactor channel allocation code</title>
<updated>2017-06-15T12:25:38+00:00</updated>
<author>
<name>Mikko Perttunen</name>
<email>mperttunen@nvidia.com</email>
</author>
<published>2017-06-14T23:18:42+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=8474b02531c4881a762c52ef869c52429e38633f'/>
<id>urn:sha1:8474b02531c4881a762c52ef869c52429e38633f</id>
<content type='text'>
This is largely a rewrite of the Host1x channel allocation code, bringing
several changes:

- The previous code could deadlock due to an interaction
  between the 'reflock' mutex and CDMA timeout handling.
  This gets rid of the mutex.
- Support for more than 32 channels, required for Tegra186
- General refactoring, including better encapsulation
  of channel ownership handling into channel.c

Signed-off-by: Mikko Perttunen &lt;mperttunen@nvidia.com&gt;
Reviewed-by: Dmitry Osipenko &lt;digetx@gmail.com&gt;
Tested-by: Dmitry Osipenko &lt;digetx@gmail.com&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>gpu: host1x: Forbid unrelated SETCLASS opcode in the firewall</title>
<updated>2017-06-15T12:23:50+00:00</updated>
<author>
<name>Dmitry Osipenko</name>
<email>digetx@gmail.com</email>
</author>
<published>2017-06-14T23:18:37+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=0f563a4bf66e5182f0882efee398f7e6bc0bb1be'/>
<id>urn:sha1:0f563a4bf66e5182f0882efee398f7e6bc0bb1be</id>
<content type='text'>
Several channels could be made to write the same unit concurrently via
the SETCLASS opcode, trusting userspace is a bad idea. It should be
possible to drop the per-client channel reservation and add a per-unit
locking by inserting MLOCK's to the command stream to re-allow the
SETCLASS opcode, but it will be much more work. Let's forbid the
unit-unrelated class changes for now.

Signed-off-by: Dmitry Osipenko &lt;digetx@gmail.com&gt;
Reviewed-by: Erik Faye-Lund &lt;kusmabite@gmail.com&gt;
Reviewed-by: Mikko Perttunen &lt;mperttunen@nvidia.com&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>drm/tegra: dc: Disable plane if it is invisible</title>
<updated>2017-06-15T12:20:30+00:00</updated>
<author>
<name>Dmitry Osipenko</name>
<email>digetx@gmail.com</email>
</author>
<published>2017-06-14T23:18:31+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=80d3eef16e16912df967a083da237d56dc4493b8'/>
<id>urn:sha1:80d3eef16e16912df967a083da237d56dc4493b8</id>
<content type='text'>
On Tegra20 if plane has width or height equal to 0, it will be infinitely
wide or tall. Let's disable the plane if it is invisible on atomic state
committing to fix the issue. The Rockchip DRM driver does the same.

Signed-off-by: Dmitry Osipenko &lt;digetx@gmail.com&gt;
Reviewed-by: Erik Faye-Lund &lt;kusmabite@gmail.com&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>drm/tegra: dc: Apply clipping to the plane</title>
<updated>2017-06-15T12:20:11+00:00</updated>
<author>
<name>Dmitry Osipenko</name>
<email>digetx@gmail.com</email>
</author>
<published>2017-06-14T23:18:30+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=7d2058571aafad239e7f1a3c04a830c6ec6a426f'/>
<id>urn:sha1:7d2058571aafad239e7f1a3c04a830c6ec6a426f</id>
<content type='text'>
On Tegra20 an overlay plane should be clipped, otherwise its output is
distorted once plane crosses display boundary.

Signed-off-by: Dmitry Osipenko &lt;digetx@gmail.com&gt;
Reviewed-by: Erik Faye-Lund &lt;kusmabite@gmail.com&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>drm/tegra: dc: Avoid reset asserts on Tegra20</title>
<updated>2017-06-15T12:19:23+00:00</updated>
<author>
<name>Dmitry Osipenko</name>
<email>digetx@gmail.com</email>
</author>
<published>2017-06-14T23:18:29+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=6ac1571b4c60cb73a1f174b15ea93f7e38d74a88'/>
<id>urn:sha1:6ac1571b4c60cb73a1f174b15ea93f7e38d74a88</id>
<content type='text'>
Commit 33a8eb8d40ee ("drm/tegra: dc: Implement runtime PM") introduced
HW reset control. It causes a hang on Tegra20 if both display
controllers are utilized (RGB panel and HDMI). The TRM suggests that
each display controller has its own reset control, apparently it is not
correct.

Fixes: 33a8eb8d40ee ("drm/tegra: dc: Implement runtime PM")
Signed-off-by: Dmitry Osipenko &lt;digetx@gmail.com&gt;
Reviewed-by: Erik Faye-Lund &lt;kusmabite@gmail.com&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>drm/tegra: Check syncpoint ID in the 'submit' IOCTL</title>
<updated>2017-06-15T12:17:21+00:00</updated>
<author>
<name>Dmitry Osipenko</name>
<email>digetx@gmail.com</email>
</author>
<published>2017-06-14T23:18:28+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=e0b2ce02108498e41e8956d29ea4c27f16dbf9e0'/>
<id>urn:sha1:e0b2ce02108498e41e8956d29ea4c27f16dbf9e0</id>
<content type='text'>
In case of invalid syncpoint ID, the host1x_syncpt_get() returns NULL and
none of its users perform a check of the returned pointer later. Let's bail
out until it's too late.

Signed-off-by: Dmitry Osipenko &lt;digetx@gmail.com&gt;
Reviewed-by: Mikko Perttunen &lt;mperttunen@nvidia.com&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>drm/tegra: Correct copying of waitchecks and disable them in the 'submit' IOCTL</title>
<updated>2017-06-15T12:16:37+00:00</updated>
<author>
<name>Dmitry Osipenko</name>
<email>digetx@gmail.com</email>
</author>
<published>2017-06-14T23:18:27+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=d0fbbdff2e19aabccc1107b7e12ab9f3cbf626ef'/>
<id>urn:sha1:d0fbbdff2e19aabccc1107b7e12ab9f3cbf626ef</id>
<content type='text'>
The waitchecks along with multiple syncpoints per submit are not ready
for use yet, let's forbid them for now.

Signed-off-by: Dmitry Osipenko &lt;digetx@gmail.com&gt;
Reviewed-by: Mikko Perttunen &lt;mperttunen@nvidia.com&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>drm/tegra: Check for malformed offsets and sizes in the 'submit' IOCTL</title>
<updated>2017-06-15T12:16:07+00:00</updated>
<author>
<name>Dmitry Osipenko</name>
<email>digetx@gmail.com</email>
</author>
<published>2017-06-14T23:18:26+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=368f622c0d76a22662af33759be8c4408819295d'/>
<id>urn:sha1:368f622c0d76a22662af33759be8c4408819295d</id>
<content type='text'>
If commands buffer claims a number of words that is higher than its BO can
fit, a kernel OOPS will be fired on the out-of-bounds BO access. This was
triggered by an opentegra Xorg driver that erroneously pushed too many
commands to the pushbuf.

The CDMA commands buffer address is 4 bytes aligned, so check its
alignment.

The maximum number of the CDMA gather fetches is 16383, add a check for
it.

Add a sanity check for the relocations in a same way.

[   46.829393] Unable to handle kernel paging request at virtual address f09b2000
...
[&lt;c04a3ba4&gt;] (host1x_job_pin) from [&lt;c04dfcd0&gt;] (tegra_drm_submit+0x474/0x510)
[&lt;c04dfcd0&gt;] (tegra_drm_submit) from [&lt;c04deea0&gt;] (tegra_submit+0x50/0x6c)
[&lt;c04deea0&gt;] (tegra_submit) from [&lt;c04c07c0&gt;] (drm_ioctl+0x1e4/0x3ec)
[&lt;c04c07c0&gt;] (drm_ioctl) from [&lt;c02541a0&gt;] (do_vfs_ioctl+0x9c/0x8e4)
[&lt;c02541a0&gt;] (do_vfs_ioctl) from [&lt;c0254a1c&gt;] (SyS_ioctl+0x34/0x5c)
[&lt;c0254a1c&gt;] (SyS_ioctl) from [&lt;c0107640&gt;] (ret_fast_syscall+0x0/0x3c)

Signed-off-by: Dmitry Osipenko &lt;digetx@gmail.com&gt;
Reviewed-by: Erik Faye-Lund &lt;kusmabite@gmail.com&gt;
Reviewed-by: Mikko Perttunen &lt;mperttunen@nvidia.com&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
</feed>
