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<title>kernel/linux.git/drivers/gpu/drm/tegra/vic.c, branch v5.10.263</title>
<subtitle>Linux kernel stable tree (mirror)</subtitle>
<id>https://git.radix-linux.su/kernel/linux.git/atom?h=v5.10.263</id>
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<updated>2022-01-27T09:53:57+00:00</updated>
<entry>
<title>drm/tegra: vic: Fix DMA API misuse</title>
<updated>2022-01-27T09:53:57+00:00</updated>
<author>
<name>Robin Murphy</name>
<email>robin.murphy@arm.com</email>
</author>
<published>2021-12-10T17:54:44+00:00</published>
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<id>urn:sha1:3849ec830bf714d57d08a0efd1e1125b023ee4e7</id>
<content type='text'>
[ Upstream commit 5566174cb10a5167d59b0793871cab7990b149b8 ]

Upon failure, dma_alloc_coherent() returns NULL. If that does happen,
passing some uninitialised stack contents to dma_mapping_error() - which
belongs to a different API in the first place - has precious little
chance of detecting it.

Also include the correct header, because the fragile transitive
inclusion currently providing it is going to break soon.

Fixes: 20e7dce255e9 ("drm/tegra: Remove memory allocation from Falcon library")
CC: Thierry Reding &lt;thierry.reding@gmail.com&gt;
CC: Mikko Perttunen &lt;mperttunen@nvidia.com&gt;
CC: dri-devel@lists.freedesktop.org
Signed-off-by: Robin Murphy &lt;robin.murphy@arm.com&gt;
Reviewed-by: Christoph Hellwig &lt;hch@lst.de&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</content>
</entry>
<entry>
<title>drm/tegra: Fix reference leak when pm_runtime_get_sync() fails</title>
<updated>2021-03-04T10:37:42+00:00</updated>
<author>
<name>Qinglang Miao</name>
<email>miaoqinglang@huawei.com</email>
</author>
<published>2020-12-01T12:56:31+00:00</published>
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<id>urn:sha1:0cdfdd1f03c2a6b22036cf8670278e6948472b7b</id>
<content type='text'>
[ Upstream commit dcdfe2712b68f1e9dbf4f1a96ad59b80e5cc0ef7 ]

The PM reference count is not expected to be incremented on return in
these Tegra functions.

However, pm_runtime_get_sync() will increment the PM reference count
even on failure. Forgetting to put the reference again will result in
a leak.

Replace it with pm_runtime_resume_and_get() to keep the usage counter
balanced.

Fixes: fd67e9c6ed5a ("drm/tegra: Do not implement runtime PM")
Reported-by: Hulk Robot &lt;hulkci@huawei.com&gt;
Signed-off-by: Qinglang Miao &lt;miaoqinglang@huawei.com&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</content>
</entry>
<entry>
<title>gpu: host1x: Rename "parent" to "host"</title>
<updated>2020-01-10T15:37:38+00:00</updated>
<author>
<name>Thierry Reding</name>
<email>treding@nvidia.com</email>
</author>
<published>2019-12-02T09:51:58+00:00</published>
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<id>urn:sha1:608f43ad27ab26700677cc4d9ead3b2d9d338a21</id>
<content type='text'>
Rename the host1x clients' parent to "host" because that more closely
describes what it is. The parent can be confused with the parent device
in terms of the device hierarchy. Subsequent patches will add a new
member that refers to the parent in that hierarchy.

Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>drm/tegra: Silence expected errors on IOMMU attach</title>
<updated>2019-12-04T12:37:44+00:00</updated>
<author>
<name>Thierry Reding</name>
<email>treding@nvidia.com</email>
</author>
<published>2019-12-03T16:19:12+00:00</published>
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<id>urn:sha1:a8817489dc3e3b1910842958a3b9d9e4832e99b0</id>
<content type='text'>
Subdevices may not be hooked up to an IOMMU via device tree. Detect such
situations and avoid confusing users by not emitting an error message.

Reviewed-by: Daniel Vetter &lt;daniel.vetter@ffwll.ch&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>drm/tegra: vic: Export module device table</title>
<updated>2019-12-04T12:37:27+00:00</updated>
<author>
<name>Thierry Reding</name>
<email>treding@nvidia.com</email>
</author>
<published>2019-12-03T16:19:11+00:00</published>
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<id>urn:sha1:82d73874d422b43359698f73c418a02322c886d5</id>
<content type='text'>
Export the module device table to ensure the VIC compatible strings are
listed in the module's aliases table. This in turn causes the driver to
be automatically loaded on boot if VIC is the only enabled subdevice of
the logical host1x DRM device.

Reviewed-by: Daniel Vetter &lt;daniel.vetter@ffwll.ch&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>drm/tegra: falcon: Clarify address usage</title>
<updated>2019-10-29T14:04:36+00:00</updated>
<author>
<name>Thierry Reding</name>
<email>treding@nvidia.com</email>
</author>
<published>2019-10-28T12:37:16+00:00</published>
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<id>urn:sha1:d972d6247628054f4a9f05c084a1f52de9df209d</id>
<content type='text'>
Rename paddr -&gt; iova and vaddr -&gt; virt to make it clearer how these
addresses are used. This is important for a subsequent patch that makes
a distinction between the physical address (physical address of the
system memory from the CPU's point of view) and the IOVA (physical
address of the system memory from the device's point of view).

Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>drm/tegra: Remove memory allocation from Falcon library</title>
<updated>2019-10-29T14:04:36+00:00</updated>
<author>
<name>Thierry Reding</name>
<email>treding@nvidia.com</email>
</author>
<published>2019-10-28T12:37:15+00:00</published>
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<id>urn:sha1:20e7dce255e96a4d58168cf48e20210146dacf23</id>
<content type='text'>
Having to provide allocator hooks to the Falcon library is somewhat
cumbersome and it doesn't give the users of the library a lot of
flexibility to deal with allocations. Instead, remove the notion of
Falcon "operations" and let drivers deal with the memory allocations
themselves.

Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>drm/tegra: Simplify IOMMU group selection</title>
<updated>2019-10-29T14:04:34+00:00</updated>
<author>
<name>Thierry Reding</name>
<email>treding@nvidia.com</email>
</author>
<published>2019-10-28T12:37:08+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=7edd7961e58d531d19758134919de13dac47bcbe'/>
<id>urn:sha1:7edd7961e58d531d19758134919de13dac47bcbe</id>
<content type='text'>
All the devices that make up the DRM device are now part of the same
IOMMU group. This simplifies the handling of the IOMMU attachment and
also avoids exhausting the number of IOMMUs available on early Tegra
SoC generations.

Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>drm/tegra: Move IOMMU group into host1x client</title>
<updated>2019-10-28T10:18:37+00:00</updated>
<author>
<name>Thierry Reding</name>
<email>treding@nvidia.com</email>
</author>
<published>2019-02-08T13:35:13+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=aacdf19849734d1be5e407932228ae101ba5b92f'/>
<id>urn:sha1:aacdf19849734d1be5e407932228ae101ba5b92f</id>
<content type='text'>
Handling of the IOMMU group attachment is common to all clients, so move
the group into the client to simplify code.

Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>drm/tegra: vic: Use common IOMMU attach/detach code</title>
<updated>2019-10-28T10:18:36+00:00</updated>
<author>
<name>Thierry Reding</name>
<email>treding@nvidia.com</email>
</author>
<published>2019-02-08T13:15:44+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=7baa943e0bb22454887edd1fffb2d00a4b842fe5'/>
<id>urn:sha1:7baa943e0bb22454887edd1fffb2d00a4b842fe5</id>
<content type='text'>
Reuse common code to attach to or detach from an IOMMU domain.

Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
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