kernel/linux.git/drivers/gpu/drm/tegra/dc.h, branch v5.16

drm/tegra: dc: Remove unused variables

2021-09-16T16:06:50+00:00

Remove unused variables from tegra_crtc_update_memory_bandwidth(). Fixes: 04d5d5df9df7 ("drm/tegra: dc: Support memory bandwidth management") Reported-by: kernel test robot Signed-off-by: Dmitry Osipenko Reviewed-by: Mikko Perttunen Signed-off-by: Thierry Reding

drm/tegra: dc: Extend debug stats with total number of events

2021-08-13T10:31:07+00:00

It's useful to know the total number of underflow events and currently the debug stats are getting reset each time CRTC is being disabled. Let's account the overall number of events that doesn't get a reset. Reviewed-by: Michał Mirosław Signed-off-by: Dmitry Osipenko Signed-off-by: Thierry Reding

drm/tegra: dc: Support memory bandwidth management

2021-08-13T10:30:33+00:00

Display controller (DC) performs isochronous memory transfers, and thus, has a requirement for a minimum memory bandwidth that shall be fulfilled, otherwise framebuffer data can't be fetched fast enough and this results in a DC's data-FIFO underflow that follows by a visual corruption. The Memory Controller drivers provide facility for memory bandwidth management via interconnect API. Let's wire up the interconnect API support to the DC driver in order to fix the distorted display output on T30 Ouya, T124 TK1 and other Tegra devices. Tested-by: Peter Geis # Ouya T30 Tested-by: Matt Merhar # Ouya T30 Tested-by: Nicolas Chauvet # PAZ00 T20 and TK1 T124 Signed-off-by: Dmitry Osipenko [treding@nvidia.com: unbreak Tegra186+ display support] Signed-off-by: Thierry Reding

drm/tegra: hub: Implement basic scaling support

2021-05-31T12:30:11+00:00

Parameterize code in several places to allow scaling of windows. Note that this currently still relies on static programming of the various metering and memory pool allocation registers. This seems to work for the common cases, but may eventually need to be updated to support use-cases with multiple windows and higher bandwidth and latency requirements. Signed-off-by: Thierry Reding

drm/tegra: hub: Fix YUV support

2021-05-31T12:30:11+00:00

The driver currently exposes several YUV formats but fails to properly program all the registers needed to display such formats. Add the right programming sequences so that overlay windows can be used to accelerate color format conversions in multimedia playback use-cases. Signed-off-by: Thierry Reding

drm/tegra: Support sector layout on Tegra194

2021-03-31T15:42:14+00:00

Tegra194 has a special physical address bit that enables some memory swizzling logic to support different sector layouts. Support the bit that selects the sector layout which is passed in the framebuffer modifier. Signed-off-by: Thierry Reding

drm/tegra: dc: Implement hardware cursor on Tegra186 and later

2021-03-31T15:42:14+00:00

The hardware cursor on Tegra186 differs slightly from the implementation on older SoC generations. In particular the new implementation relies on software for clipping the cursor against the screen. Fortunately, atomic KMS already computes clipped coordinates for (cursor) planes, so this is trivial to implement. The format supported by the hardware cursor is also slightly different. v2: use more drm_rect helpers (Dmitry) Signed-off-by: Thierry Reding Reviewed-by: Dmitry Osipenko Signed-off-by: Thierry Reding

drm/tegra: plane: Support horizontal reflection

2020-07-17T14:06:17+00:00

Support horizontal reflection mode which will allow to support 180° rotation mode when combined with the vertical reflection. Signed-off-by: Dmitry Osipenko Signed-off-by: Thierry Reding

drm/tegra: plane: Rename bottom_up to reflect_y

2020-07-17T14:06:16+00:00

This makes the naming consistent with the DRM core. Signed-off-by: Dmitry Osipenko Signed-off-by: Thierry Reding

drm/tegra: Move IOMMU group into host1x client

2019-10-28T10:18:37+00:00

Handling of the IOMMU group attachment is common to all clients, so move the group into the client to simplify code. Signed-off-by: Thierry Reding