<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/linux.git/drivers/gpu/drm/stm/ltdc.h, branch linux-7.0.y</title>
<subtitle>Linux kernel stable tree (mirror)</subtitle>
<id>https://git.radix-linux.su/kernel/linux.git/atom?h=linux-7.0.y</id>
<link rel='self' href='https://git.radix-linux.su/kernel/linux.git/atom?h=linux-7.0.y'/>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/'/>
<updated>2025-08-28T15:43:57+00:00</updated>
<entry>
<title>drm/stm: ltdc: handle lvds pixel clock</title>
<updated>2025-08-28T15:43:57+00:00</updated>
<author>
<name>Yannick Fertre</name>
<email>yannick.fertre@foss.st.com</email>
</author>
<published>2025-08-22T14:34:17+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=b7243862f82a088d6fb7e22a25c7c024818e631d'/>
<id>urn:sha1:b7243862f82a088d6fb7e22a25c7c024818e631d</id>
<content type='text'>
Handle LVDS pixel clock.

The LTDC operates with multiple clock domains for register access,
requiring all clocks to be provided during read/write operations.  This
imposes a dependency between the LVDS and LTDC to access correctly all
LTDC registers.  And because both IPs' pixel rates must be synchronized,
the LTDC has to handle the LVDS clock.

Signed-off-by: Yannick Fertre &lt;yannick.fertre@foss.st.com&gt;
Acked-by: Yannick Fertre &lt;yannick.fertre@foss.st.com&gt;
Acked-by: Philippe Cornu &lt;philippe.cornu@foss.st.com&gt;
Link: https://lore.kernel.org/r/20250822-drm-misc-next-v5-8-9c825e28f733@foss.st.com
Signed-off-by: Raphael Gallais-Pou &lt;raphael.gallais-pou@foss.st.com&gt;
</content>
</entry>
<entry>
<title>drm/stm: ltdc: support new hardware version for STM32MP25 SoC</title>
<updated>2025-08-28T15:43:56+00:00</updated>
<author>
<name>Yannick Fertre</name>
<email>yannick.fertre@foss.st.com</email>
</author>
<published>2025-08-22T14:34:16+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=d80667642b0f43580efd489d627dd24aa10ab98f'/>
<id>urn:sha1:d80667642b0f43580efd489d627dd24aa10ab98f</id>
<content type='text'>
STM32MP25 SoC features a new version of the LTDC IP.  Add its compatible
to the list of device to probe and implement its quirks.

This hardware supports a pad frequency of 150MHz and a peripheral bus
clock.

Signed-off-by: Yannick Fertre &lt;yannick.fertre@foss.st.com&gt;
Acked-by: Yannick Fertre &lt;yannick.fertre@foss.st.com&gt;
Acked-by: Philippe Cornu &lt;philippe.cornu@foss.st.com&gt;
Link: https://lore.kernel.org/r/20250822-drm-misc-next-v5-7-9c825e28f733@foss.st.com
Signed-off-by: Raphael Gallais-Pou &lt;raphael.gallais-pou@foss.st.com&gt;
</content>
</entry>
<entry>
<title>drm/stm: ltdc: update hardware error management</title>
<updated>2022-06-27T14:01:50+00:00</updated>
<author>
<name>Yannick Fertre</name>
<email>yannick.fertre@foss.st.com</email>
</author>
<published>2022-06-03T13:46:54+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=7d008eecb0cfc2b1a1a742d6faa0a02f339535c2'/>
<id>urn:sha1:7d008eecb0cfc2b1a1a742d6faa0a02f339535c2</id>
<content type='text'>
The latest hardware version (0x40100) supports a hardware threshold
register (aka FUTR) to trigger a fifo underrun interrupt.
A software threshold has been implemented for other hardware versions.
The threshold is set to 128 by default.

Signed-off-by: Yannick Fertre &lt;yannick.fertre@foss.st.com&gt;
Signed-off-by: Philippe Cornu &lt;philippe.cornu@foss.st.com&gt;
Link: https://patchwork.freedesktop.org/patch/msgid/20220603134654.594373-1-yannick.fertre@foss.st.com
</content>
</entry>
<entry>
<title>drm/stm: ltdc: add support of horizontal &amp; vertical mirroring</title>
<updated>2022-06-27T14:01:40+00:00</updated>
<author>
<name>Yannick Fertre</name>
<email>yannick.fertre@foss.st.com</email>
</author>
<published>2022-06-03T13:45:47+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=c6193dc57f74bc626c02a9880b921a7f124e1456'/>
<id>urn:sha1:c6193dc57f74bc626c02a9880b921a7f124e1456</id>
<content type='text'>
Support of vertical &amp; horizontal mirroring features thanks to
the plane rotation property.

Signed-off-by: Yannick Fertre &lt;yannick.fertre@foss.st.com&gt;
Signed-off-by: Philippe Cornu &lt;philippe.cornu@foss.st.com&gt;
Link: https://patchwork.freedesktop.org/patch/msgid/20220603134547.593790-1-yannick.fertre@foss.st.com
</content>
</entry>
<entry>
<title>drm/stm: ltdc: add support of the dynamic z-order</title>
<updated>2022-06-27T14:01:17+00:00</updated>
<author>
<name>Yannick Fertre</name>
<email>yannick.fertre@foss.st.com</email>
</author>
<published>2022-06-03T13:44:59+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=62467fccb73fb700d23c35fcac71cb0cf0662ddb'/>
<id>urn:sha1:62467fccb73fb700d23c35fcac71cb0cf0662ddb</id>
<content type='text'>
Zpos property is immutable for all hardware versions except the last
version (0x40100) which support the blending order feature
(dynamic z-order).

Signed-off-by: Yannick Fertre &lt;yannick.fertre@foss.st.com&gt;
Signed-off-by: Philippe Cornu &lt;philippe.cornu@foss.st.com&gt;
Link: https://patchwork.freedesktop.org/patch/msgid/20220603134459.593379-1-yannick.fertre@foss.st.com
</content>
</entry>
<entry>
<title>drm/stm: ltdc: add support for CRC hashing feature</title>
<updated>2022-02-25T13:14:28+00:00</updated>
<author>
<name>Raphael Gallais-Pou</name>
<email>raphael.gallais-pou@foss.st.com</email>
</author>
<published>2022-02-11T10:46:20+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=79b44684a14e363d24c299b772f037344ad8c8dc'/>
<id>urn:sha1:79b44684a14e363d24c299b772f037344ad8c8dc</id>
<content type='text'>
This patch adds the CRC hashing feature supported by some recent hardware
versions of the LTDC. This is useful for test suite such as IGT-GPU-tools
[1] where a CRTC output frame can be compared to a test reference frame
thanks to their respective CRC hash.

[1] https://cgit.freedesktop.org/drm/igt-gpu-tools

Signed-off-by: Raphael Gallais-Pou &lt;raphael.gallais-pou@foss.st.com&gt;
Acked-by: Yannick Fertre &lt;yannick.fertre@foss.st.com&gt;
Signed-off-by: Philippe Cornu &lt;philippe.cornu@foss.st.com&gt;
Link: https://patchwork.freedesktop.org/patch/msgid/20220211104620.421177-1-raphael.gallais-pou@foss.st.com
</content>
</entry>
<entry>
<title>drm/stm: ltdc: add support of ycbcr pixel formats</title>
<updated>2022-01-13T13:06:22+00:00</updated>
<author>
<name>Yannick Fertre</name>
<email>yannick.fertre@foss.st.com</email>
</author>
<published>2021-12-15T21:48:43+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=484e72d3146bd3000a785f4709d5d44835ea8bbe'/>
<id>urn:sha1:484e72d3146bd3000a785f4709d5d44835ea8bbe</id>
<content type='text'>
This patch adds the following YCbCr input pixel formats on the latest
LTDC hardware version:

1 plane  (co-planar)  : YUYV, YVYU, UYVY, VYUY
2 planes (semi-planar): NV12, NV21
3 planes (full-planar): YU12=I420=DRM YUV420, YV12=DRM YVU420

Signed-off-by: Yannick Fertre &lt;yannick.fertre@foss.st.com&gt;
Acked-by: Philippe Cornu &lt;philippe.cornu@foss.st.com&gt;
Reviewed-by: Philippe Cornu &lt;philippe.cornu@foss.st.com&gt;
Signed-off-by: Philippe Cornu &lt;philippe.cornu@foss.st.com&gt;
Link: https://patchwork.freedesktop.org/patch/msgid/20211215214843.20703-1-yannick.fertre@foss.st.com
</content>
</entry>
<entry>
<title>drm/stm: ltdc: add support of flexible pixel formats</title>
<updated>2022-01-13T13:06:22+00:00</updated>
<author>
<name>Yannick Fertre</name>
<email>yannick.fertre@foss.st.com</email>
</author>
<published>2021-12-15T21:48:35+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=8f2b5f6dcbdaa507e4c4456e6c1b41691117e1d0'/>
<id>urn:sha1:8f2b5f6dcbdaa507e4c4456e6c1b41691117e1d0</id>
<content type='text'>
This feature allows the generation of any RGB pixel format.
The list of supported formats is no longer linked to the
register LXPFCR_PF, that the reason why a list of drm formats is
defined for each display controller version.

Signed-off-by: Yannick Fertre &lt;yannick.fertre@foss.st.com&gt;
Acked-by: Philippe Cornu &lt;philippe.cornu@foss.st.com&gt;
Reviewed-by: Philippe Cornu &lt;philippe.cornu@foss.st.com&gt;
Reviewed-by: Raphael Gallais-Pou &lt;raphael.gallais-pou@foss.st.com&gt;
Tested-by: Raphael Gallais-Pou &lt;raphael.gallais-pou@foss.st.com&gt;
Signed-off-by: Philippe Cornu &lt;philippe.cornu@foss.st.com&gt;
Link: https://patchwork.freedesktop.org/patch/msgid/20211215214835.20593-1-yannick.fertre@foss.st.com
</content>
</entry>
<entry>
<title>drm/stm: ltdc: add per plane update support</title>
<updated>2022-01-13T13:06:21+00:00</updated>
<author>
<name>Yannick Fertre</name>
<email>yannick.fertre@foss.st.com</email>
</author>
<published>2021-12-15T21:48:17+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=a55d08e0d4945b0374c6dd0e8b3f9b28ce5720ed'/>
<id>urn:sha1:a55d08e0d4945b0374c6dd0e8b3f9b28ce5720ed</id>
<content type='text'>
Recent ltdc hardware versions offer the ability
to update a plane independently of others planes.
This is could be useful especially if a plane is
assigned to another OS.

Signed-off-by: Yannick Fertre &lt;yannick.fertre@foss.st.com&gt;
Acked-by: Philippe Cornu &lt;philippe.cornu@foss.st.com&gt;
Reviewed-by: Philippe Cornu &lt;philippe.cornu@foss.st.com&gt;
Reviewed-by: Raphael Gallais-Pou &lt;raphael.gallais-pou@foss.st.com&gt;
Signed-off-by: Philippe Cornu &lt;philippe.cornu@foss.st.com&gt;
Link: https://patchwork.freedesktop.org/patch/msgid/20211215214817.20310-1-yannick.fertre@foss.st.com
</content>
</entry>
<entry>
<title>drm/stm: ltdc: add YCbCr 422 output support</title>
<updated>2022-01-13T13:06:20+00:00</updated>
<author>
<name>Yannick Fertre</name>
<email>yannick.fertre@foss.st.com</email>
</author>
<published>2021-12-15T21:47:50+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=fb998edf9edc21c9925560860cc36136814a707a'/>
<id>urn:sha1:fb998edf9edc21c9925560860cc36136814a707a</id>
<content type='text'>
LTDC 40100 hw version supports the YCbCr 422 output,
reducing the output pins from 24 to 16. This feature
is useful for some external devices like HDMI bridges.

Both ITU-R BT.601 &amp; ITU-R BT.709 are supported.

It is also possible to choose the chrominance order between
* Cb is output first (Y0Cb, then Y1Cr, Y2Cb and so on).
* Cr is output first (Y0Cr, then Y1Cb, Y2Cr and so on).

Signed-off-by: Yannick Fertre &lt;yannick.fertre@foss.st.com&gt;
Acked-by: Philippe Cornu &lt;philippe.cornu@foss.st.com&gt;
Reviewed-by: Philippe Cornu &lt;philippe.cornu@foss.st.com&gt;
Reviewed-by: Raphael Gallais-Pou &lt;raphael.gallais-pou@foss.st.com&gt;
Signed-off-by: Philippe Cornu &lt;philippe.cornu@foss.st.com&gt;
Link: https://patchwork.freedesktop.org/patch/msgid/20211215214750.20105-1-yannick.fertre@foss.st.com
</content>
</entry>
</feed>
