Linux kernel stable tree (mirror) https://git.radix-linux.su/kernel/linux.git/atom?h=v4.16.11 2018-02-22T09:59:33+00:00 2018-02-22T09:59:33+00:00 Ingo Molnar mingo@kernel.org 2018-02-22T09:54:55+00:00 urn:sha1:ed7158bae41044ff696e9aafd5ada46d391a5a2e On lkml suggestions were made to split up such trivial typo fixes into per subsystem patches: --- a/arch/x86/boot/compressed/eboot.c +++ b/arch/x86/boot/compressed/eboot.c @@ -439,7 +439,7 @@ setup_uga32(void **uga_handle, unsigned long size, u32 *width, u32 *height) struct efi_uga_draw_protocol *uga = NULL, *first_uga; efi_guid_t uga_proto = EFI_UGA_PROTOCOL_GUID; unsigned long nr_ugas; - u32 *handles = (u32 *)uga_handle;; + u32 *handles = (u32 *)uga_handle; efi_status_t status = EFI_INVALID_PARAMETER; int i; This patch is the result of the following script: $ sed -i 's/;;$/;/g' $(git grep -E ';;$' | grep "\.[ch]:" | grep -vwE 'for|ia64' | cut -d: -f1 | sort | uniq) ... followed by manual review to make sure it's all good. Splitting this up is just crazy talk, let's get over with this and just do it. Reported-by: Pavel Machek <pavel@ucw.cz> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: linux-kernel@vger.kernel.org Signed-off-by: Ingo Molnar <mingo@kernel.org> 2018-02-02T01:48:47+00:00 Linus Torvalds torvalds@linux-foundation.org 2018-02-02T01:48:47+00:00 urn:sha1:4bf772b14675411a69b3c807f73006de0fe4b649 Pull drm updates from Dave Airlie: "This seems to have been a comparatively quieter merge window, I assume due to holidays etc. The "biggest" change is AMD header cleanups, which merge/remove a bunch of them. The AMD gpu scheduler is now being made generic with the etnaviv driver wanting to reuse the code, hopefully other drivers can go in the same direction. Otherwise it's the usual lots of stuff in i915/amdgpu, not so much stuff elsewhere. Core: - Add .last_close and .output_poll_changed helpers to reduce driver footprints - Fix plane clipping - Improved debug printing support - Add panel orientation property - Update edid derived properties at edid setting - Reduction in fbdev driver footprint - Move amdgpu scheduler into core for other drivers to use. i915: - Selftest and IGT improvements - Fast boot prep work on IPS, pipe config - HW workarounds for Cannonlake, Geminilake - Cannonlake clock and HDMI2.0 fixes - GPU cache invalidation and context switch improvements - Display planes cleanup - New PMU interface for perf queries - New firmware support for KBL/SKL - Geminilake HW workaround for perforamce - Coffeelake stolen memory improvements - GPU reset robustness work - Cannonlake horizontal plane flipping - GVT work amdgpu/radeon: - RV and Vega header file cleanups (lots of lines gone!) - TTM operation context support - 48-bit GPUVM support for Vega/RV - ECC support for Vega - Resizeable BAR support - Multi-display sync support - Enable swapout for reserved BOs during allocation - S3 fixes on Raven - GPU reset cleanup and fixes - 2+1 level GPU page table amdkfd: - GFX7/8 SDMA user queues support - Hardware scheduling for multiple processes - dGPU prep work rcar: - Added R8A7743/5 support - System suspend/resume support sun4i: - Multi-plane support for YUV formats - A83T and LVDS support msm: - Devfreq support for GPU tegra: - Prep work for adding Tegra186 support - Tegra186 HDMI support - HDMI2.0 and zpos support by using generic helpers tilcdc: - Misc fixes omapdrm: - Support memory bandwidth limits - DSI command mode panel cleanups - DMM error handling exynos: - drop the old IPP subdriver. etnaviv: - Occlusion query fixes - Job handling fixes - Prep work for hooking in gpu scheduler armada: - Move closer to atomic modesetting - Allow disabling primary plane if overlay is full screen imx: - Format modifier support - Add tile prefetch to PRE - Runtime PM support for PRG ast: - fix LUT loading" * tag 'drm-for-v4.16' of git://people.freedesktop.org/~airlied/linux: (1471 commits) drm/ast: Load lut in crtc_commit drm: Check for lessee in DROP_MASTER ioctl drm: fix gpu scheduler link order drm/amd/display: Demote error print to debug print when ATOM impl missing dma-buf: fix reservation_object_wait_timeout_rcu once more v2 drm/amdgpu: Avoid leaking PM domain on driver unbind (v2) drm/amd/amdgpu: Add Polaris version check drm/amdgpu: Reenable manual GPU reset from sysfs drm/amdgpu: disable MMHUB power gating on raven drm/ttm: Don't unreserve swapped BOs that were previously reserved drm/ttm: Don't add swapped BOs to swap-LRU list drm/amdgpu: only check for ECC on Vega10 drm/amd/powerplay: Fix smu_table_entry.handle type drm/ttm: add VADDR_FLAG_UPDATED_COUNT to correctly update dma_page global count drm: Fix PANEL_ORIENTATION_QUIRKS breaking the Kconfig DRM menuconfig drm/radeon: fill in rb backend map on evergreen/ni. drm/amdgpu/gfx9: fix ngg enablement to clear gds reserved memory (v2) drm/ttm: only free pages rather than update global memory count together drm/amdgpu: fix CPU based VM updates drm/amdgpu: fix typo in amdgpu_vce_validate_bo ... 2018-01-12T01:45:18+00:00 Dave Airlie airlied@redhat.com 2018-01-12T01:45:18+00:00 urn:sha1:323b20c4af6e315e665b0ea85035fea7d738e0cc Updates for 4.16.. fairly small this time around, main thing is devfreq support for the gpu. * tag 'drm-msm-next-2018-01-10' of git://people.freedesktop.org/~robclark/linux: drm/msm: Add devfreq support for the GPU drm/msm/adreno: a5xx: Explicitly program the CP0 performance counter drm/msm/adreno: Read the speed bins for a5xx targets drm/msm/adreno: Move clock parsing to adreno_gpu_init() drm/msm/adreno: Cleanup chipid parsing drm/msm/gpu: Remove unused bus scaling code drm/msm/adreno: Remove a useless call to dev_pm_opp_get_freq() drm/msm/adreno: Call dev_pm_opp_put() drm/msm: Fix NULL deref in adreno_load_gpu drm/msm: gpu: Only sync fences on rings that exist drm/msm: fix leak in failed get_pages drm/msm: avoid false-positive -Wmaybe-uninitialized warning drm/msm/mdp4: Deduplicate bus_find_device() by name matching drm/msm: add missing MODULE_FIRMWARE declarations drm/msm: update adreno firmware path in MODULE_FIRMWARE drm/msm: free kstrdup'd cmdline drm/msm: fix msm_rd_dump_submit prototype drm/msm: fix spelling mistake: "ringubffer" -> "ringbuffer" 2018-01-10T19:30:03+00:00 Jordan Crouse jcrouse@codeaurora.org 2018-01-10T17:41:54+00:00 urn:sha1:f91c14ab448af4d9d57350301dd9d6b6a7b6128a Add support for devfreq to dynamically control the GPU frequency. By default try to use the 'simple_ondemand' governor which can adjust the frequency based on GPU load. v2: Fix __aeabi_uldivmod issue from the 0 day bot and use devfreq_recommended_opp() as suggested by Rob. Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com> 2018-01-10T13:58:42+00:00 Jordan Crouse jcrouse@codeaurora.org 2017-11-21T19:40:57+00:00 urn:sha1:c09513cfebd8d936a7aed3c0302104fb47a4a03a Even though the default countable for CP0 is CP_ALWAYS_COUNT (0), program the selector during HW initialization in an effort to be up front about which counters are programmed and why. Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com> 2018-01-10T13:58:42+00:00 Jordan Crouse jcrouse@codeaurora.org 2017-11-21T19:40:56+00:00 urn:sha1:f56d9df656c41b141399c1edbcc9b0ed048120c2 Some 5xx based chipsets have different bins for GPU clock speeds. Read the fuses (if applicable) and set the appropriate OPP table. This will only work with OPP v2 tables - the bin will be ignored for legacy pwrlevel tables. Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com> 2018-01-10T13:58:42+00:00 Jordan Crouse jcrouse@codeaurora.org 2017-11-21T19:40:55+00:00 urn:sha1:999ae6edc1c19e316dd61f4b3e1a6984ea293280 Move the clock parsing to adreno_gpu_init() to allow for target specific probing and manipulation of the clock tables. Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com> 2018-01-10T13:58:42+00:00 Jordan Crouse jcrouse@codeaurora.org 2017-11-21T19:40:54+00:00 urn:sha1:728bde66df82e8a0ed6114aa55c2ee3e94ff993b We don't need to convert the chipid to an intermediate value and then back again into a struct adreno_rev. Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com> 2018-01-10T13:58:42+00:00 Jordan Crouse jcrouse@codeaurora.org 2017-11-21T19:40:53+00:00 urn:sha1:1babd706b455802d17762cb44ecdfcd953bb3dd5 Remove the downstream bus scaling code. It isn't needed for for compatibility with a downstream or vendor kernel. Get it out of the way to clear space for devfreq support. Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com> 2018-01-10T13:58:41+00:00 Jordan Crouse jcrouse@codeaurora.org 2017-11-21T19:40:52+00:00 urn:sha1:156a537d056aa9057d1e2d94e5a81505580000bd Calling dev_pm_opp_find_freq_floor() returns the matched frequency in 'freq'. We don't need to call dev_pm_opp_get_freq() again to get the frequency value. Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>