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<title>kernel/linux.git/drivers/gpu/drm/msm/msm_ringbuffer.h, branch v6.1.168</title>
<subtitle>Linux kernel stable tree (mirror)</subtitle>
<id>https://git.radix-linux.su/kernel/linux.git/atom?h=v6.1.168</id>
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<updated>2023-05-17T09:53:53+00:00</updated>
<entry>
<title>drm/msm: Hangcheck progress detection</title>
<updated>2023-05-17T09:53:53+00:00</updated>
<author>
<name>Rob Clark</name>
<email>robdclark@chromium.org</email>
</author>
<published>2022-11-14T19:30:41+00:00</published>
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<id>urn:sha1:46062a1c0a0133d712dfccfaaa17c2a003f582d8</id>
<content type='text'>
[ Upstream commit d73b1d02de0858b96f743e1e8b767fb092ae4c1b ]

If the hangcheck timer expires, check if the fw's position in the
cmdstream has advanced (changed) since last timer expiration, and
allow it up to three additional "extensions" to it's alotted time.
The intention is to continue to catch "shader stuck in a loop" type
hangs quickly, but allow more time for things that are actually
making forward progress.

Because we need to sample the CP state twice to detect if there has
not been progress, this also cuts the the timer's duration in half.

v2: Fix typo (REG_A6XX_CP_CSQ_IB2_STAT), add comment
v3: Only halve hangcheck timer duration for generations which
    support progress detection (hdanton); removed unused a5xx
    progress (without knowing how to adjust for data buffered
    in ROQ it is too likely to report a false negative)
v4: Comment updates to better describe the total hangcheck
    duration when progress detection is applied

Reviewed-by: Chia-I Wu &lt;olvaffe@gmail.com&gt;
Tested-by: Chia-I Wu &lt;olvaffe@gmail.com&gt; # dEQP-GLES2.functional.flush_finish.wait
Signed-off-by: Rob Clark &lt;robdclark@chromium.org&gt;
Reviewed-by: Akhil P Oommen &lt;quic_akhilpo@quicinc.com&gt;
Patchwork: https://patchwork.freedesktop.org/patch/511584/
Link: https://lore.kernel.org/r/20221114193049.1533391-3-robdclark@gmail.com
Stable-dep-of: ca090c837b43 ("drm/msm: fix missing wq allocation error handling")
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</content>
</entry>
<entry>
<title>drm/msm/gpu: Drop duplicate fence counter</title>
<updated>2022-04-21T22:03:11+00:00</updated>
<author>
<name>Rob Clark</name>
<email>robdclark@chromium.org</email>
</author>
<published>2022-04-11T21:58:31+00:00</published>
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<id>urn:sha1:f9d5355fa5b6b25c3b6e1727bc36d11bb8c8ee24</id>
<content type='text'>
The ring seqno counter duplicates the fence-context last_fence counter.
They end up getting incremented in lock-step, on the same scheduler
thread, but the split just makes things less obvious.

Signed-off-by: Rob Clark &lt;robdclark@chromium.org&gt;
Link: https://lore.kernel.org/r/20220411215849.297838-3-robdclark@gmail.com
Signed-off-by: Rob Clark &lt;robdclark@chromium.org&gt;
</content>
</entry>
<entry>
<title>drm/msm: Conversion to drm scheduler</title>
<updated>2021-07-28T16:19:00+00:00</updated>
<author>
<name>Rob Clark</name>
<email>robdclark@chromium.org</email>
</author>
<published>2021-07-28T01:06:14+00:00</published>
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<id>urn:sha1:1d8a5ca436ee4a28eec14cb813f790f7cdeeee19</id>
<content type='text'>
For existing adrenos, there is one or more ringbuffer, depending on
whether preemption is supported.  When preemption is supported, each
ringbuffer has it's own priority.  A submitqueue (which maps to a
gl context or vk queue in userspace) is mapped to a specific ring-
buffer at creation time, based on the submitqueue's priority.

Each ringbuffer has it's own drm_gpu_scheduler.  Each submitqueue
maps to a drm_sched_entity.  And each submit maps to a drm_sched_job.

Closes: https://gitlab.freedesktop.org/drm/msm/-/issues/4
Signed-off-by: Rob Clark &lt;robdclark@chromium.org&gt;
Acked-by: Christian König &lt;christian.koenig@amd.com&gt;
Link: https://lore.kernel.org/r/20210728010632.2633470-10-robdclark@gmail.com
Signed-off-by: Rob Clark &lt;robdclark@chromium.org&gt;
</content>
</entry>
<entry>
<title>drm/msm: Protect ring-&gt;submits with it's own lock</title>
<updated>2020-11-05T00:00:56+00:00</updated>
<author>
<name>Rob Clark</name>
<email>robdclark@chromium.org</email>
</author>
<published>2020-10-23T16:51:16+00:00</published>
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<id>urn:sha1:77d205290aa944895cf7e8bea500b8fd95a6b05b</id>
<content type='text'>
One less place to rely on dev-&gt;struct_mutex.

Signed-off-by: Rob Clark &lt;robdclark@chromium.org&gt;
Reviewed-by: Jordan Crouse &lt;jcrouse@codeaurora.org&gt;
Reviewed-by: Kristian H. Kristensen &lt;hoegsberg@google.com&gt;
Signed-off-by: Rob Clark &lt;robdclark@chromium.org&gt;
</content>
</entry>
<entry>
<title>drm/msm: Document and rename preempt_lock</title>
<updated>2020-11-05T00:00:56+00:00</updated>
<author>
<name>Rob Clark</name>
<email>robdclark@chromium.org</email>
</author>
<published>2020-10-23T16:51:15+00:00</published>
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<id>urn:sha1:77c406038e830a4b6219b14a116cd2a6ac9f4908</id>
<content type='text'>
Before adding another lock, give ring-&gt;lock a more descriptive name.

Signed-off-by: Rob Clark &lt;robdclark@chromium.org&gt;
Reviewed-by: Jordan Crouse &lt;jcrouse@codeaurora.org&gt;
Reviewed-by: Kristian H. Kristensen &lt;hoegsberg@google.com&gt;
Signed-off-by: Rob Clark &lt;robdclark@chromium.org&gt;
</content>
</entry>
<entry>
<title>drm/msm/a6xx: Add support for per-instance pagetables</title>
<updated>2020-09-12T17:48:32+00:00</updated>
<author>
<name>Jordan Crouse</name>
<email>jcrouse@codeaurora.org</email>
</author>
<published>2020-08-17T22:01:41+00:00</published>
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<id>urn:sha1:84c31ee16f903b481e7d4b94e2fc931d373494a0</id>
<content type='text'>
Add support for using per-instance pagetables if all the dependencies are
available.

Signed-off-by: Jordan Crouse &lt;jcrouse@codeaurora.org&gt;
Signed-off-by: Rob Clark &lt;robdclark@chromium.org&gt;
Reviewed-by: Akhil P Oommen &lt;akhilpo@codeaurora.org&gt;
</content>
</entry>
<entry>
<title>treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 234</title>
<updated>2019-06-19T15:09:07+00:00</updated>
<author>
<name>Thomas Gleixner</name>
<email>tglx@linutronix.de</email>
</author>
<published>2019-06-03T05:44:50+00:00</published>
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<id>urn:sha1:caab277b1de0a22b675c4c95fc7b285ec2eb5bf5</id>
<content type='text'>
Based on 1 normalized pattern(s):

  this program is free software you can redistribute it and or modify
  it under the terms of the gnu general public license version 2 as
  published by the free software foundation this program is
  distributed in the hope that it will be useful but without any
  warranty without even the implied warranty of merchantability or
  fitness for a particular purpose see the gnu general public license
  for more details you should have received a copy of the gnu general
  public license along with this program if not see http www gnu org
  licenses

extracted by the scancode license scanner the SPDX license identifier

  GPL-2.0-only

has been chosen to replace the boilerplate/reference in 503 file(s).

Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Reviewed-by: Alexios Zavras &lt;alexios.zavras@intel.com&gt;
Reviewed-by: Allison Randal &lt;allison@lohutok.net&gt;
Reviewed-by: Enrico Weigelt &lt;info@metux.net&gt;
Cc: linux-spdx@vger.kernel.org
Link: https://lkml.kernel.org/r/20190602204653.811534538@linutronix.de
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>drm/msm/gpu: Add per-submission statistics</title>
<updated>2018-12-11T18:05:28+00:00</updated>
<author>
<name>Jordan Crouse</name>
<email>jcrouse@codeaurora.org</email>
</author>
<published>2018-11-02T15:25:20+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=568692102b6ad52fae27bef66793bc2e5770e429'/>
<id>urn:sha1:568692102b6ad52fae27bef66793bc2e5770e429</id>
<content type='text'>
Add infrastructure to track statistics for GPU submissions
by sampling certain perfcounters before and after a submission.

To store the statistics, the per-ring memptrs region is
expanded to include room for up to 64 entries - this should
cover a reasonable amount of inflight submissions without
worrying about losing data. The target specific code inserts
PM4 commands to sample the counters before and after
submission and store them in the data region. The CPU can
access the data after the submission retires to make sense
of the statistics and communicate them to the user.

Signed-off-by: Jordan Crouse &lt;jcrouse@codeaurora.org&gt;
Signed-off-by: Rob Clark &lt;robdclark@gmail.com&gt;
</content>
</entry>
<entry>
<title>drm/msm: Implement preemption for A5XX targets</title>
<updated>2017-10-28T15:01:38+00:00</updated>
<author>
<name>Jordan Crouse</name>
<email>jcrouse@codeaurora.org</email>
</author>
<published>2017-10-20T17:07:01+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=b1fc2839d2f92d09da90d1e09156a73ddaba8a93'/>
<id>urn:sha1:b1fc2839d2f92d09da90d1e09156a73ddaba8a93</id>
<content type='text'>
Implement preemption for A5XX targets - this allows multiple
ringbuffers for different priorities with automatic preemption
of a lower priority ringbuffer if a higher one is ready.

Signed-off-by: Jordan Crouse &lt;jcrouse@codeaurora.org&gt;
Signed-off-by: Rob Clark &lt;robdclark@gmail.com&gt;
</content>
</entry>
<entry>
<title>drm/msm: Shadow current pointer in the ring until command is complete</title>
<updated>2017-10-28T15:01:37+00:00</updated>
<author>
<name>Jordan Crouse</name>
<email>jcrouse@codeaurora.org</email>
</author>
<published>2017-10-20T17:06:59+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=4c7085a5d581a547232086b4ac0f553024eb9cec'/>
<id>urn:sha1:4c7085a5d581a547232086b4ac0f553024eb9cec</id>
<content type='text'>
Add a shadow pointer to track the current command being written into
the ring. Don't commit it as 'cur' until the command is submitted.
Because 'cur' is used to construct the software copy of the wptr this
ensures that somebody peeking in on the ring doesn't assume that a
command is inflight while it is being written. This isn't a huge deal
with a single ring (though technically the hangcheck could assume
the system is prematurely busy when it isn't) but it will be rather
important for preemption where the decision to preempt is based
on a non-empty ringbuffer. Without a shadow an aggressive preemption
scheme could assume that the ringbuffer is non empty and switch to it
before the CPU is done writing the command and boom.

Even though preemption won't be supported for all targets because of
the way the code is organized it is simpler to make this generic for
all targets. The extra load for non-preemption targets should be
minimal.

Signed-off-by: Jordan Crouse &lt;jcrouse@codeaurora.org&gt;
Signed-off-by: Rob Clark &lt;robdclark@gmail.com&gt;
</content>
</entry>
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