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<title>kernel/linux.git/drivers/gpu/drm/msm/msm_gpu.h, branch v5.10.263</title>
<subtitle>Linux kernel stable tree (mirror)</subtitle>
<id>https://git.radix-linux.su/kernel/linux.git/atom?h=v5.10.263</id>
<link rel='self' href='https://git.radix-linux.su/kernel/linux.git/atom?h=v5.10.263'/>
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<updated>2024-10-17T13:07:48+00:00</updated>
<entry>
<title>drm/msm: Drop priv-&gt;lastctx</title>
<updated>2024-10-17T13:07:48+00:00</updated>
<author>
<name>Rob Clark</name>
<email>robdclark@chromium.org</email>
</author>
<published>2021-11-09T18:11:02+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=d041301f304cce6dec29baa961f878dec85b63ed'/>
<id>urn:sha1:d041301f304cce6dec29baa961f878dec85b63ed</id>
<content type='text'>
[ Upstream commit 1d054c9b8457b56a651109fac21f56f46ccd46b2 ]

cur_ctx_seqno already does the same thing, but handles the edge cases
where a refcnt'd context can live after lastclose.  So let's not have
two ways to do the same thing.

Signed-off-by: Rob Clark &lt;robdclark@chromium.org&gt;
Reviewed-by: Akhil P Oommen &lt;akhilpo@codeaurora.org&gt;
Link: https://lore.kernel.org/r/20211109181117.591148-3-robdclark@gmail.com
Signed-off-by: Rob Clark &lt;robdclark@chromium.org&gt;
Stable-dep-of: a30f9f65b5ac ("drm/msm/a5xx: workaround early ring-buffer emptiness check")
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</content>
</entry>
<entry>
<title>drm/msm: Add priv-&gt;mm_lock to protect active/inactive lists</title>
<updated>2024-10-17T13:07:47+00:00</updated>
<author>
<name>Rob Clark</name>
<email>robdclark@chromium.org</email>
</author>
<published>2020-10-23T16:51:14+00:00</published>
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<id>urn:sha1:9dffbbd7b84f7bf244074dc324ca6806c04ff996</id>
<content type='text'>
[ Upstream commit d984457b31c4c53d2af374d5e78b3eb64debd483 ]

Rather than relying on the big dev-&gt;struct_mutex hammer, introduce a
more specific lock for protecting the bo lists.

Signed-off-by: Rob Clark &lt;robdclark@chromium.org&gt;
Reviewed-by: Jordan Crouse &lt;jcrouse@codeaurora.org&gt;
Reviewed-by: Kristian H. Kristensen &lt;hoegsberg@google.com&gt;
Signed-off-by: Rob Clark &lt;robdclark@chromium.org&gt;
Stable-dep-of: a30f9f65b5ac ("drm/msm/a5xx: workaround early ring-buffer emptiness check")
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</content>
</entry>
<entry>
<title>drm/msm: Allow a5xx to mark the RPTR shadow as privileged</title>
<updated>2020-09-15T17:47:44+00:00</updated>
<author>
<name>Jordan Crouse</name>
<email>jcrouse@codeaurora.org</email>
</author>
<published>2020-09-14T22:40:21+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=8907afb476ac6754a4d1ba8d2dd16dbb0fd4d428'/>
<id>urn:sha1:8907afb476ac6754a4d1ba8d2dd16dbb0fd4d428</id>
<content type='text'>
Newer microcode versions have support for the CP_WHERE_AM_I opcode which
allows the RPTR shadow memory to be marked as privileged to protect it
from corruption. Move the RPTR shadow into its own buffer and protect it
it if the current microcode version supports the new feature.

We can also re-enable preemption for those targets that support
CP_WHERE_AM_I. Start out by preemptively assuming that we can enable
preemption and disable it in a5xx_hw_init if the microcode version comes
back as too old.

Signed-off-by: Jordan Crouse &lt;jcrouse@codeaurora.org&gt;
Signed-off-by: Rob Clark &lt;robdclark@chromium.org&gt;
</content>
</entry>
<entry>
<title>drm/msm: Show process names in gem_describe</title>
<updated>2020-09-12T17:48:32+00:00</updated>
<author>
<name>Rob Clark</name>
<email>robdclark@chromium.org</email>
</author>
<published>2020-08-17T22:01:45+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=25faf2f2e06565d5cd0b97f77364fbe38f14ef71'/>
<id>urn:sha1:25faf2f2e06565d5cd0b97f77364fbe38f14ef71</id>
<content type='text'>
In $debugfs/gem we already show any vma(s) associated with an object.
Also show process names if the vma's address space is a per-process
address space.

Signed-off-by: Rob Clark &lt;robdclark@chromium.org&gt;
Reviewed-by: Jordan Crouse &lt;jcrouse@codeaurora.org&gt;
Reviewed-by: Bjorn Andersson &lt;bjorn.andersson@linaro.org&gt;
</content>
</entry>
<entry>
<title>drm/msm: Add support for private address space instances</title>
<updated>2020-09-12T17:48:32+00:00</updated>
<author>
<name>Jordan Crouse</name>
<email>jcrouse@codeaurora.org</email>
</author>
<published>2020-08-17T22:01:40+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=933415e24bd0dcb29f837040df20e677626054f8'/>
<id>urn:sha1:933415e24bd0dcb29f837040df20e677626054f8</id>
<content type='text'>
Add support for allocating private address space instances. Targets that
support per-context pagetables should implement their own function to
allocate private address spaces.

The default will return a pointer to the global address space.

Signed-off-by: Jordan Crouse &lt;jcrouse@codeaurora.org&gt;
Signed-off-by: Rob Clark &lt;robdclark@chromium.org&gt;
Reviewed-by: Bjorn Andersson &lt;bjorn.andersson@linaro.org&gt;
</content>
</entry>
<entry>
<title>drm/msm: Drop context arg to gpu-&gt;submit()</title>
<updated>2020-09-12T17:45:56+00:00</updated>
<author>
<name>Jordan Crouse</name>
<email>jcrouse@codeaurora.org</email>
</author>
<published>2020-08-17T22:01:37+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=15eb9ad073c035499b4abd7456822c8696ac1941'/>
<id>urn:sha1:15eb9ad073c035499b4abd7456822c8696ac1941</id>
<content type='text'>
Now that we can get the ctx from the submitqueue, the extra arg is
redundant.

Signed-off-by: Jordan Crouse &lt;jcrouse@codeaurora.org&gt;
[split out of previous patch to reduce churny noise]
Signed-off-by: Rob Clark &lt;robdclark@chromium.org&gt;
Reviewed-by: Bjorn Andersson &lt;bjorn.andersson@linaro.org&gt;
</content>
</entry>
<entry>
<title>drm/msm: Add a context pointer to the submitqueue</title>
<updated>2020-09-12T17:45:56+00:00</updated>
<author>
<name>Jordan Crouse</name>
<email>jcrouse@codeaurora.org</email>
</author>
<published>2020-08-17T22:01:36+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=cf655d615931b905bbb40f7b5387eb0efd1742e0'/>
<id>urn:sha1:cf655d615931b905bbb40f7b5387eb0efd1742e0</id>
<content type='text'>
Each submitqueue is attached to a context. Add a pointer to the
context to the submitqueue at create time and refcount it so
that it stays around through the life of the queue.

Co-developed-by: Rob Clark &lt;robdclark@chromium.org&gt;
Signed-off-by: Jordan Crouse &lt;jcrouse@codeaurora.org&gt;
Signed-off-by: Rob Clark &lt;robdclark@chromium.org&gt;
Reviewed-by: Bjorn Andersson &lt;bjorn.andersson@linaro.org&gt;
</content>
</entry>
<entry>
<title>drm/msm: Set adreno_smmu as gpu's drvdata</title>
<updated>2020-09-12T17:45:56+00:00</updated>
<author>
<name>Rob Clark</name>
<email>robdclark@chromium.org</email>
</author>
<published>2020-08-17T22:01:32+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=9cba4056a112785bf25e582fc6e7baa8346fe684'/>
<id>urn:sha1:9cba4056a112785bf25e582fc6e7baa8346fe684</id>
<content type='text'>
This will be populated by adreno-smmu, to provide a way for coordinating
enabling/disabling TTBR0 translation.

Signed-off-by: Rob Clark &lt;robdclark@chromium.org&gt;
Reviewed-by: Jordan Crouse &lt;jcrouse@codeaurora.org&gt;
Reviewed-by: Bjorn Andersson &lt;bjorn.andersson@linaro.org&gt;
</content>
</entry>
<entry>
<title>drm/msm/gpu: Add dev_to_gpu() helper</title>
<updated>2020-09-12T17:45:56+00:00</updated>
<author>
<name>Rob Clark</name>
<email>robdclark@chromium.org</email>
</author>
<published>2020-08-17T22:01:31+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=69a9313b6617745bd841e1357e894abc85b9573d'/>
<id>urn:sha1:69a9313b6617745bd841e1357e894abc85b9573d</id>
<content type='text'>
In a later patch, the drvdata will not directly be 'struct msm_gpu *',
so add a helper to reduce the churn.

Signed-off-by: Rob Clark &lt;robdclark@chromium.org&gt;
Reviewed-by: Jordan Crouse &lt;jcrouse@codeaurora.org&gt;
Reviewed-by: Bjorn Andersson &lt;bjorn.andersson@linaro.org&gt;
</content>
</entry>
<entry>
<title>drm/msm: Enable expanded apriv support for a650</title>
<updated>2020-09-04T19:14:07+00:00</updated>
<author>
<name>Jordan Crouse</name>
<email>jcrouse@codeaurora.org</email>
</author>
<published>2020-09-04T02:03:11+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=604234f33658cdd72f686be405a99646b397d0b3'/>
<id>urn:sha1:604234f33658cdd72f686be405a99646b397d0b3</id>
<content type='text'>
a650 supports expanded apriv support that allows us to map critical buffers
(ringbuffer and memstore) as as privileged to protect them from corruption.

Cc: stable@vger.kernel.org
Signed-off-by: Jordan Crouse &lt;jcrouse@codeaurora.org&gt;
Signed-off-by: Rob Clark &lt;robdclark@chromium.org&gt;
</content>
</entry>
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