<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/linux.git/drivers/gpu/drm/msm/msm_gpu.c, branch v5.10.78</title>
<subtitle>Linux kernel stable tree (mirror)</subtitle>
<id>https://git.radix-linux.su/kernel/linux.git/atom?h=v5.10.78</id>
<link rel='self' href='https://git.radix-linux.su/kernel/linux.git/atom?h=v5.10.78'/>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/'/>
<updated>2020-09-22T15:28:15+00:00</updated>
<entry>
<title>drm/msm: Fix premature purging of BO</title>
<updated>2020-09-22T15:28:15+00:00</updated>
<author>
<name>Akhil P Oommen</name>
<email>akhilpo@codeaurora.org</email>
</author>
<published>2020-09-22T14:55:26+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=9d8baa2bf224f6f010644b2a60a3ca73d829663e'/>
<id>urn:sha1:9d8baa2bf224f6f010644b2a60a3ca73d829663e</id>
<content type='text'>
In the case where we have a back-to-back submission that shares the same
BO, this BO will be prematurely moved to inactive_list while retiring the
first submit. But it will be still part of the second submit which is
being processed by the GPU. Now, if the shrinker happens to be triggered at
this point, it will result in a premature purging of this BO.

To fix this, we need to refcount BO while doing submit and retire. Then,
it should be moved to inactive list when this refcount becomes 0.

Signed-off-by: Akhil P Oommen &lt;akhilpo@codeaurora.org&gt;
Signed-off-by: Rob Clark &lt;robdclark@chromium.org&gt;
</content>
</entry>
<entry>
<title>drm/msm: Show process names in gem_describe</title>
<updated>2020-09-12T17:48:32+00:00</updated>
<author>
<name>Rob Clark</name>
<email>robdclark@chromium.org</email>
</author>
<published>2020-08-17T22:01:45+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=25faf2f2e06565d5cd0b97f77364fbe38f14ef71'/>
<id>urn:sha1:25faf2f2e06565d5cd0b97f77364fbe38f14ef71</id>
<content type='text'>
In $debugfs/gem we already show any vma(s) associated with an object.
Also show process names if the vma's address space is a per-process
address space.

Signed-off-by: Rob Clark &lt;robdclark@chromium.org&gt;
Reviewed-by: Jordan Crouse &lt;jcrouse@codeaurora.org&gt;
Reviewed-by: Bjorn Andersson &lt;bjorn.andersson@linaro.org&gt;
</content>
</entry>
<entry>
<title>drm/msm: Add support for private address space instances</title>
<updated>2020-09-12T17:48:32+00:00</updated>
<author>
<name>Jordan Crouse</name>
<email>jcrouse@codeaurora.org</email>
</author>
<published>2020-08-17T22:01:40+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=933415e24bd0dcb29f837040df20e677626054f8'/>
<id>urn:sha1:933415e24bd0dcb29f837040df20e677626054f8</id>
<content type='text'>
Add support for allocating private address space instances. Targets that
support per-context pagetables should implement their own function to
allocate private address spaces.

The default will return a pointer to the global address space.

Signed-off-by: Jordan Crouse &lt;jcrouse@codeaurora.org&gt;
Signed-off-by: Rob Clark &lt;robdclark@chromium.org&gt;
Reviewed-by: Bjorn Andersson &lt;bjorn.andersson@linaro.org&gt;
</content>
</entry>
<entry>
<title>drm/msm: Drop context arg to gpu-&gt;submit()</title>
<updated>2020-09-12T17:45:56+00:00</updated>
<author>
<name>Jordan Crouse</name>
<email>jcrouse@codeaurora.org</email>
</author>
<published>2020-08-17T22:01:37+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=15eb9ad073c035499b4abd7456822c8696ac1941'/>
<id>urn:sha1:15eb9ad073c035499b4abd7456822c8696ac1941</id>
<content type='text'>
Now that we can get the ctx from the submitqueue, the extra arg is
redundant.

Signed-off-by: Jordan Crouse &lt;jcrouse@codeaurora.org&gt;
[split out of previous patch to reduce churny noise]
Signed-off-by: Rob Clark &lt;robdclark@chromium.org&gt;
Reviewed-by: Bjorn Andersson &lt;bjorn.andersson@linaro.org&gt;
</content>
</entry>
<entry>
<title>drm/msm: Set adreno_smmu as gpu's drvdata</title>
<updated>2020-09-12T17:45:56+00:00</updated>
<author>
<name>Rob Clark</name>
<email>robdclark@chromium.org</email>
</author>
<published>2020-08-17T22:01:32+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=9cba4056a112785bf25e582fc6e7baa8346fe684'/>
<id>urn:sha1:9cba4056a112785bf25e582fc6e7baa8346fe684</id>
<content type='text'>
This will be populated by adreno-smmu, to provide a way for coordinating
enabling/disabling TTBR0 translation.

Signed-off-by: Rob Clark &lt;robdclark@chromium.org&gt;
Reviewed-by: Jordan Crouse &lt;jcrouse@codeaurora.org&gt;
Reviewed-by: Bjorn Andersson &lt;bjorn.andersson@linaro.org&gt;
</content>
</entry>
<entry>
<title>drm/msm/gpu: Add dev_to_gpu() helper</title>
<updated>2020-09-12T17:45:56+00:00</updated>
<author>
<name>Rob Clark</name>
<email>robdclark@chromium.org</email>
</author>
<published>2020-08-17T22:01:31+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=69a9313b6617745bd841e1357e894abc85b9573d'/>
<id>urn:sha1:69a9313b6617745bd841e1357e894abc85b9573d</id>
<content type='text'>
In a later patch, the drvdata will not directly be 'struct msm_gpu *',
so add a helper to reduce the churn.

Signed-off-by: Rob Clark &lt;robdclark@chromium.org&gt;
Reviewed-by: Jordan Crouse &lt;jcrouse@codeaurora.org&gt;
Reviewed-by: Bjorn Andersson &lt;bjorn.andersson@linaro.org&gt;
</content>
</entry>
<entry>
<title>drm/msm/gpu: Add suspend/resume tracepoints</title>
<updated>2020-09-12T16:59:58+00:00</updated>
<author>
<name>Rob Clark</name>
<email>robdclark@chromium.org</email>
</author>
<published>2020-09-01T15:41:56+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=ec1cb6e4408abe5fb723872d265fefa939f1a2ba'/>
<id>urn:sha1:ec1cb6e4408abe5fb723872d265fefa939f1a2ba</id>
<content type='text'>
Signed-off-by: Rob Clark &lt;robdclark@chromium.org&gt;
</content>
</entry>
<entry>
<title>drm/msm/gpu: Add GPU freq_change traces</title>
<updated>2020-09-09T22:25:53+00:00</updated>
<author>
<name>Rob Clark</name>
<email>robdclark@chromium.org</email>
</author>
<published>2020-09-01T15:41:54+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=74c0a69cc5bee0eb1f1cf740f7480095c4a94fe7'/>
<id>urn:sha1:74c0a69cc5bee0eb1f1cf740f7480095c4a94fe7</id>
<content type='text'>
Technically the GMU specific one is a bit redundant, but it was useful
to track down a bug.

Signed-off-by: Rob Clark &lt;robdclark@chromium.org&gt;
Reviewed-by: Jordan Crouse &lt;jcrouse@codeaurora.org&gt;
</content>
</entry>
<entry>
<title>drm/msm: Enable expanded apriv support for a650</title>
<updated>2020-09-04T19:14:07+00:00</updated>
<author>
<name>Jordan Crouse</name>
<email>jcrouse@codeaurora.org</email>
</author>
<published>2020-09-04T02:03:11+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=604234f33658cdd72f686be405a99646b397d0b3'/>
<id>urn:sha1:604234f33658cdd72f686be405a99646b397d0b3</id>
<content type='text'>
a650 supports expanded apriv support that allows us to map critical buffers
(ringbuffer and memstore) as as privileged to protect them from corruption.

Cc: stable@vger.kernel.org
Signed-off-by: Jordan Crouse &lt;jcrouse@codeaurora.org&gt;
Signed-off-by: Rob Clark &lt;robdclark@chromium.org&gt;
</content>
</entry>
<entry>
<title>drm: msm: a6xx: send opp instead of a frequency</title>
<updated>2020-07-31T13:46:15+00:00</updated>
<author>
<name>Sharat Masetty</name>
<email>smasetty@codeaurora.org</email>
</author>
<published>2020-07-13T12:41:42+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=1f60d11423db7152508f965fcf2db13a1094f7f3'/>
<id>urn:sha1:1f60d11423db7152508f965fcf2db13a1094f7f3</id>
<content type='text'>
This patch changes the plumbing to send the devfreq recommended opp rather
than the frequency. Also consolidate and rearrange the code in a6xx to set
the GPU frequency and the icc vote in preparation for the upcoming
changes for GPU-&gt;DDR scaling votes.

Signed-off-by: Sharat Masetty &lt;smasetty@codeaurora.org&gt;
Signed-off-by: Akhil P Oommen &lt;akhilpo@codeaurora.org&gt;
Signed-off-by: Rob Clark &lt;robdclark@chromium.org&gt;
</content>
</entry>
</feed>
