kernel/linux.git/drivers/gpu/drm/msm/dp/dp_ctrl.c, branch linux-5.11.y

drm/msm/dp: Add a missing semi-colon

2021-03-04T11:15:08+00:00

[ Upstream commit 182b4a2d251305201b6f9cae29067f7112f05835 ] A missing semicolon here causes my external display to stop working. Indeed, missing the semicolon on the return statement leads to dp_panel_update_tu_timings() not existing because the compiler thinks it's part of the return statement of a void function, so it must not be important. $ ./scripts/bloat-o-meter before.o after.o add/remove: 1/1 grow/shrink: 0/1 up/down: 7400/-7540 (-140) Function old new delta dp_panel_update_tu_timings - 7400 +7400 _dp_ctrl_calc_tu.constprop 18024 17900 -124 dp_panel_update_tu_timings.constprop 7416 - -7416 Total: Before=54440, After=54300, chg -0.26% Add a semicolon so this function works like it used to. Cc: Sean Paul Cc: Kuogee Hsieh Cc: linux-arm-msm@vger.kernel.org Cc: dri-devel@lists.freedesktop.org Cc: freedreno@lists.freedesktop.org Cc: Lee Jones Fixes: cc9014bf63a4 ("drm/msm/dp/dp_ctrl: Move 'tu' from the stack to the heap") Signed-off-by: Stephen Boyd Signed-off-by: Rob Clark Signed-off-by: Sasha Levin

drm/msm/dp/dp_ctrl: Move 'tu' from the stack to the heap

2020-11-29T18:36:53+00:00

'struct tu_algo_data' is huge ~400 Bytes. Fixes the following W=1 kernel build warning(s): drivers/gpu/drm/msm/dp/dp_ctrl.c: In function ‘_dp_ctrl_calc_tu.constprop’: drivers/gpu/drm/msm/dp/dp_ctrl.c:938:1: warning: the frame size of 1184 bytes is larger than 1024 bytes [-Wframe-larger-than=] Cc: Rob Clark Cc: Sean Paul Cc: David Airlie Cc: Daniel Vetter Cc: Chandan Uddaraju Cc: Kuogee Hsieh Cc: linux-arm-msm@vger.kernel.org Cc: dri-devel@lists.freedesktop.org Cc: freedreno@lists.freedesktop.org Signed-off-by: Lee Jones Signed-off-by: Rob Clark

drm/msm/dp: skip checking LINK_STATUS_UPDATED bit

2020-11-10T20:39:48+00:00

Some dongle will not clear LINK_STATUS_UPDATED bit after DPCD read which cause link training failed. This patch just read 6 bytes of DPCD link status from sink and return without checking LINK_STATUS_UPDATED bit. Only 8 bits are used to represent link rate at sinker DPCD. The really link rate is 2.7Mb times the 8 bits value. For example, 0x0A at DPCD is equal to 2.7Gb (10 * 2.7Mb). This patch also convert 8 bits value of DPCD to really link rate to fix worng link rate error during phy compliance test. Fixes: 6625e2637d93 ("drm/msm/dp: DisplayPort PHY compliance tests fixup") Signed-off-by: Kuogee Hsieh Signed-off-by: Rob Clark

drm/msm/dp: deinitialize mainlink if link training failed

2020-11-10T20:39:31+00:00

DP compo phy have to be enable to start link training. When link training failed phy need to be disabled so that next link traning can be proceed smoothly at next plug in. This patch de-initialize mainlink to disable phy if link training failed. This prevent system crash due to disp_cc_mdss_dp_link_intf_clk stuck at "off" state. This patch also perform checking power_on flag at dp_display_enable() and dp_display_disable() to avoid crashing when unplug cable while display is off. Signed-off-by: Kuogee Hsieh Signed-off-by: Rob Clark

drm/msm/dp: return correct connection status after suspend

2020-11-10T20:38:58+00:00

During suspend, dp host controller and hpd block are disabled due to both ahb and aux clock are disabled. Therefore hpd plug/unplug interrupts will not be generated. At dp_pm_resume(), reinitialize both dp host controller and hpd block so that hpd plug/unplug interrupts will be generated and handled by driver so that hpd connection state is updated correctly. This patch will fix link training flaky issues. Changes in v2: -- use container_of to cast correct dp_display_private pointer at both dp_pm_suspend() and dp_pm_resume(). Changes in v3: -- replace hpd_state atomic_t with u32 Changes in v4 -- call dp_display_host_deinit() at dp_pm_suspend() -- call dp_display_host_init() at msm_dp_display_enable() -- fix phy->init_count unbalance which causes link training failed Changes in v5 -- add Fixes tag Fixes: 8ede2ecc3e5e (drm/msm/dp: Add DP compliance tests on Snapdragon Chipsets) Tested-by: Stephen Boyd Signed-off-by: Kuogee Hsieh Signed-off-by: Rob Clark

drm/msm/dp: add opp_table corner voting support base on dp_ink_clk rate

2020-11-04T16:26:26+00:00

Set link rate by using OPP set rate api so that CX level will be set accordingly based on the link rate. Changes in v2: -- remove dev from dp_ctrl_put() parameters -- Add more information to commit message Changes in v3: -- return when dev_pm_opp_set_clkname() failed Signed-off-by: Kuogee Hsieh Signed-off-by: Rob Clark

drm/msm/dp: DisplayPort PHY compliance tests fixup

2020-11-04T16:26:25+00:00

Bandwidth code was being used as test link rate. Fix this by converting bandwidth code to test link rate Do not reset voltage and pre-emphasis level during IRQ HPD attention interrupt. Also fix pre-emphasis parsing during test link status process Signed-off-by: Tanmay Shah Fixes: 8ede2ecc3e5e ("drm/msm/dp: Add DP compliance tests on Snapdragon Chipsets") Reviewed-by: Stephen Boyd Signed-off-by: Rob Clark

drm/msm/dp: Use qmp phy for DP PLL and PHY

2020-09-15T17:54:35+00:00

Make the necessary changes to the DP driver to use the qmp phy from the common phy framework instead of rolling our own in the drm subsystem. This also removes the PLL code and adds proper includes so things build. Cc: Jeykumar Sankaran Cc: Chandan Uddaraju Cc: Vara Reddy Cc: Tanmay Shah Cc: Bjorn Andersson Cc: Manu Gautam Cc: Sandeep Maheswaram Cc: Douglas Anderson Cc: Sean Paul Cc: Jonathan Marek Cc: Dmitry Baryshkov Cc: Rob Clark Signed-off-by: Stephen Boyd Signed-off-by: Rob Clark

drm/msm/dp: Add DP compliance tests on Snapdragon Chipsets

2020-09-15T17:54:34+00:00

add event thread to execute events serially from event queue. Also timeout mode is supported which allow an event be deferred to be executed at later time. Both link and phy compliant tests had been done successfully. Changes in v2: -- Fix potential deadlock by removing redundant connect_mutex -- Check and enable link clock during modeset -- Drop unused code and fix function prototypes. -- set sink power to normal operation state (D0) before DPCD read Changes in v3: -- push idle pattern at main link before timing generator off -- add timeout handles for both connect and disconnect Changes in v4: -- add ST_SUSPEND_PENDING to handles suspend/modeset test operations -- clear dp phy aux interrupt status when ERR_DPPHY_AUX error -- send segment addr during edid read -- clear bpp depth before MISC register write Changes in v5: -- add ST_SUSPENDED to fix crash at resume Changes in v6: -- at msm_dp_display_enable() do not return until resume_done to avoid kms commit timeout Signed-off-by: Kuogee Hsieh Signed-off-by: Rob Clark

drm/msm/dp: Add Display Port HPD feature

2020-09-15T17:54:34+00:00

Configure HPD registers in DP controller and enable HPD interrupt. Add interrupt to handle HPD connect and disconnect events. Changes in v8: None Signed-off-by: Tanmay Shah Signed-off-by: Rob Clark