kernel/linux.git/drivers/gpu/drm/mgag200, branch v5.16.1

drm/mgag200: Use managed interfaces for framebuffer write combining

2021-09-23T07:26:09+00:00

Replace arch_phys_wc_add() and arch_io_reserve_memtype_wc() with the rsp managed functions. Allows for removing the cleanup code for memory management Signed-off-by: Thomas Zimmermann Reviewed-by: Hans de Goede Link: https://patchwork.freedesktop.org/patch/msgid/20210916181601.9146-5-tzimmermann@suse.de

drm/mgag200: Fix uninitialized variable delta

2021-08-18T18:47:59+00:00

The variable delta is not initialized and this will cause unexpected behaviour with the comparison of tmpdelta < delta. Fix this by setting it to 0xffffffff. This matches the behaviour as in the similar function mgag200_pixpll_compute_g200se_04. v2: * move fix up by one line to align style with other functions * add additional tags from similar patch Signed-off-by: Colin Ian King Fixes: 2545ac960364 ("drm/mgag200: Abstract pixel PLL via struct mgag200_pll") Addresses-Coverity: ("Uninitialized scalar variable") Reviewed-by: Daniel Vetter Reviewed-by: Thomas Zimmermann Reported-by: kernel test robot Reported-by: Dan Carpenter Signed-off-by: Thomas Zimmermann Cc: Sam Ravnborg Cc: Dave Airlie Cc: dri-devel@lists.freedesktop.org Link: https://patchwork.freedesktop.org/patch/msgid/20210817163204.494166-1-colin.king@canonical.com

drm/mgag200: Use offset-adjusted shadow-plane mappings

2021-08-08T18:27:30+00:00

For framebuffers with non-zero offset fields, shadow-plane helpers provide a pointer to the first byte of the contained data. Use it in mgag200. Signed-off-by: Thomas Zimmermann Acked-by: Sam Ravnborg Link: https://patchwork.freedesktop.org/patch/msgid/20210803125928.27780-6-tzimmermann@suse.de

drm/mgag200: Compute PLL values during atomic check

2021-08-08T18:14:14+00:00

PLL setup can fail if the display mode's clock is not supported by any PLL configuration. Compute the PLL values during atomic check, so that atomic commits can fail at the appropriate time. If successful, use the values in the atomic-update phase. Signed-off-by: Thomas Zimmermann Acked-by: Sam Ravnborg Link: https://patchwork.freedesktop.org/patch/msgid/20210714142240.21979-14-tzimmermann@suse.de

drm/mgag200: Introduce custom CRTC state

2021-08-08T18:14:12+00:00

Inherit from struct drm_crtc_state by embeding it and providing the rsp callbacks for simple-kms helpers. No functional changes. The new state struct mgag200_crtc_state will hold PLL values for modeset operations. v2: * move the simple-kms changes into a separate patch (Sam) Signed-off-by: Thomas Zimmermann Acked-by: Sam Ravnborg Link: https://patchwork.freedesktop.org/patch/msgid/20210714142240.21979-13-tzimmermann@suse.de

drm/mgag200: Abstract pixel PLL via struct mgag200_pll

2021-08-08T18:14:05+00:00

Move all PLL compute and update functions into mgag200_pll.c. No functional changes to the rsp algorithms. Introduce struct mgag200_pll and mgag200_pll_funcs. The data strutures abstract the details of each revision's PLL. Perform calls to compute and update functionality via function pointers. Init the PLL once as part of the driver initialization. Signed-off-by: Thomas Zimmermann Acked-by: Sam Ravnborg Link: https://patchwork.freedesktop.org/patch/msgid/20210714142240.21979-11-tzimmermann@suse.de

drm/mgag200: Declare PLL clock constants static const

2021-08-08T18:14:02+00:00

Move the PLL constants to the RO data section by declaring them as static const. No functional changes. Signed-off-by: Thomas Zimmermann Acked-by: Sam Ravnborg Link: https://patchwork.freedesktop.org/patch/msgid/20210714142240.21979-10-tzimmermann@suse.de

drm/mgag200: Split PLL compute function for G200SE by rev

2021-08-08T18:13:58+00:00

The compute function for G200SE pixel PLLs handles two revisions with different algorithms. Split it accordingly to make it readable. No functional changes. Signed-off-by: Thomas Zimmermann Acked-by: Sam Ravnborg Link: https://patchwork.freedesktop.org/patch/msgid/20210714142240.21979-9-tzimmermann@suse.de

drm/mgag200: Split PLL compute functions by device type

2021-08-08T18:13:54+00:00

Several PLL functions compute values for different device types. Split them up to make the code more readable. No functional changes. Signed-off-by: Thomas Zimmermann Acked-by: Sam Ravnborg Link: https://patchwork.freedesktop.org/patch/msgid/20210714142240.21979-8-tzimmermann@suse.de

drm/mgag200: Store values (not bits) in struct mgag200_pll_values

2021-08-08T18:13:50+00:00

The fields in struct mgag200_pll_values currently hold the bits of each register. Store the PLL values instead and let the PLL-update code figure out the bits for each register. Until now, the compute function either stored plain values or register bits in struct mgag200_pll_values. The rsp update function used the values as-is. This made it very hard to correctly interpret the stored values (e.g., for logging or debugging). With the cleanup, the stored values now have a clear meaning. v2: * add a bit more context in the commit message (Sam) Signed-off-by: Thomas Zimmermann Acked-by: Sam Ravnborg Link: https://patchwork.freedesktop.org/patch/msgid/20210714142240.21979-7-tzimmermann@suse.de